Home
last modified time | relevance | path

Searched refs:MXC_CCM_CBCDR_DDR_HIFREQ_SEL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx5/
Dcrm_regs.h113 #define MXC_CCM_CBCDR_DDR_HIFREQ_SEL (0x1 << 30) macro
/external/u-boot/arch/arm/mach-imx/mx5/
Dclock.c453 if (cbcdr & MXC_CCM_CBCDR_DDR_HIFREQ_SEL) { in get_ddr_clk()