Searched refs:MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (Results 1 – 7 of 7) sorted by relevance
406 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display_clock()
469 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display_b850v3()515 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display_bx50v3()
348 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); in setup_display()
633 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); in imx_setup_hdmi()
406 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display()
336 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); in setup_display()
499 #define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7) macro