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Searched refs:MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/board/freescale/mx6sabreauto/
Dmx6sabreauto.c539 MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); in setup_display()
/external/u-boot/board/freescale/mx6sabresd/
Dmx6sabresd.c521 << MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); in setup_display()
/external/u-boot/board/congatec/cgtqmx6eval/
Dcgtqmx6eval.c653 MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); in setup_display()
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dcrm_regs.h494 #define MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET 9 macro