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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Freescale i.MX23/i.MX28 Peripheral Base Addresses
4  *
5  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
6  * on behalf of DENX Software Engineering GmbH
7  *
8  * Based on code from LTIB:
9  * Copyright (C) 2008 Embedded Alley Solutions Inc.
10  *
11  * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
12  */
13 
14 #ifndef __MXS_REGS_BASE_H__
15 #define __MXS_REGS_BASE_H__
16 
17 /*
18  * Register base addresses for i.MX23
19  */
20 #if defined(CONFIG_MX23)
21 #define	MXS_ICOLL_BASE		0x80000000
22 #define	MXS_APBH_BASE		0x80004000
23 #define	MXS_ECC8_BASE		0x80008000
24 #define	MXS_BCH_BASE		0x8000A000
25 #define	MXS_GPMI_BASE		0x8000C000
26 #define	MXS_SSP0_BASE		0x80010000
27 #define	MXS_SSP1_BASE		0x80034000
28 #define	MXS_ETM_BASE		0x80014000
29 #define	MXS_PINCTRL_BASE	0x80018000
30 #define	MXS_DIGCTL_BASE		0x8001C000
31 #define	MXS_EMI_BASE		0x80020000
32 #define	MXS_APBX_BASE		0x80024000
33 #define	MXS_DCP_BASE		0x80028000
34 #define	MXS_PXP_BASE		0x8002A000
35 #define	MXS_OCOTP_BASE		0x8002C000
36 #define	MXS_AXI_BASE		0x8002E000
37 #define	MXS_LCDIF_BASE		0x80030000
38 #define	MXS_SSP1_BASE		0x80034000
39 #define	MXS_TVENC_BASE		0x80038000
40 #define	MXS_CLKCTRL_BASE	0x80040000
41 #define	MXS_SAIF0_BASE		0x80042000
42 #define	MXS_POWER_BASE		0x80044000
43 #define	MXS_SAIF1_BASE		0x80046000
44 #define	MXS_AUDIOOUT_BASE	0x80048000
45 #define	MXS_AUDIOIN_BASE	0x8004C000
46 #define	MXS_LRADC_BASE		0x80050000
47 #define	MXS_SPDIF_BASE		0x80054000
48 #define	MXS_I2C0_BASE		0x80058000
49 #define	MXS_RTC_BASE		0x8005C000
50 #define	MXS_PWM_BASE		0x80064000
51 #define	MXS_TIMROT_BASE		0x80068000
52 #define	MXS_UARTAPP0_BASE	0x8006C000
53 #define	MXS_UARTAPP1_BASE	0x8006E000
54 #define	MXS_UARTDBG_BASE	0x80070000
55 #define	MXS_USBPHY0_BASE	0x8007C000
56 #define	MXS_USBCTRL0_BASE	0x80080000
57 #define	MXS_DRAM_BASE		0x800E0000
58 
59 /*
60  * Register base addresses for i.MX28
61  */
62 #elif defined(CONFIG_MX28)
63 #define	MXS_ICOL_BASE		0x80000000
64 #define	MXS_HSADC_BASE		0x80002000
65 #define	MXS_APBH_BASE		0x80004000
66 #define	MXS_PERFMON_BASE	0x80006000
67 #define	MXS_BCH_BASE		0x8000A000
68 #define	MXS_GPMI_BASE		0x8000C000
69 #define	MXS_SSP0_BASE		0x80010000
70 #define	MXS_SSP1_BASE		0x80012000
71 #define	MXS_SSP2_BASE		0x80014000
72 #define	MXS_SSP3_BASE		0x80016000
73 #define	MXS_PINCTRL_BASE	0x80018000
74 #define	MXS_DIGCTL_BASE		0x8001C000
75 #define	MXS_ETM_BASE		0x80022000
76 #define	MXS_APBX_BASE		0x80024000
77 #define	MXS_DCP_BASE		0x80028000
78 #define	MXS_PXP_BASE		0x8002A000
79 #define	MXS_OCOTP_BASE		0x8002C000
80 #define	MXS_AXI_AHB0_BASE	0x8002E000
81 #define	MXS_LCDIF_BASE		0x80030000
82 #define	MXS_CAN0_BASE		0x80032000
83 #define	MXS_CAN1_BASE		0x80034000
84 #define	MXS_SIMDBG_BASE		0x8003C000
85 #define	MXS_SIMGPMISEL_BASE	0x8003C200
86 #define	MXS_SIMSSPSEL_BASE	0x8003C300
87 #define	MXS_SIMMEMSEL_BASE	0x8003C400
88 #define	MXS_GPIOMON_BASE	0x8003C500
89 #define	MXS_SIMENET_BASE	0x8003C700
90 #define	MXS_ARMJTAG_BASE	0x8003C800
91 #define	MXS_CLKCTRL_BASE	0x80040000
92 #define	MXS_SAIF0_BASE		0x80042000
93 #define	MXS_POWER_BASE		0x80044000
94 #define	MXS_SAIF1_BASE		0x80046000
95 #define	MXS_LRADC_BASE		0x80050000
96 #define	MXS_SPDIF_BASE		0x80054000
97 #define	MXS_RTC_BASE		0x80056000
98 #define	MXS_I2C0_BASE		0x80058000
99 #define	MXS_I2C1_BASE		0x8005A000
100 #define	MXS_PWM_BASE		0x80064000
101 #define	MXS_TIMROT_BASE		0x80068000
102 #define	MXS_UARTAPP0_BASE	0x8006A000
103 #define	MXS_UARTAPP1_BASE	0x8006C000
104 #define	MXS_UARTAPP2_BASE	0x8006E000
105 #define	MXS_UARTAPP3_BASE	0x80070000
106 #define	MXS_UARTAPP4_BASE	0x80072000
107 #define	MXS_UARTDBG_BASE	0x80074000
108 #define	MXS_USBPHY0_BASE	0x8007C000
109 #define	MXS_USBPHY1_BASE	0x8007E000
110 #define	MXS_USBCTRL0_BASE	0x80080000
111 #define	MXS_USBCTRL1_BASE	0x80090000
112 #define	MXS_DFLPT_BASE		0x800C0000
113 #define	MXS_DRAM_BASE		0x800E0000
114 #define	MXS_ENET0_BASE		0x800F0000
115 #define	MXS_ENET1_BASE		0x800F4000
116 #else
117 #error Unkown SoC. Please set CONFIG_MX23 or CONFIG_MX28
118 #endif
119 
120 #endif /* __MXS_REGS_BASE_H__ */
121