Searched refs:Mask0 (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZTDC.cpp | 289 int Mask0, Mask1; in convertLogicOp() local
291 std::tie(Op0, Mask0, Worthy0) = ConvertedInsts[cast<Instruction>(I.getOperand(0))]; in convertLogicOp()
298 Mask = Mask0 & Mask1; in convertLogicOp()
301 Mask = Mask0 | Mask1; in convertLogicOp()
304 Mask = Mask0 ^ Mask1; in convertLogicOp()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZTDC.cpp | 289 int Mask0, Mask1; in convertLogicOp() local
291 std::tie(Op0, Mask0, Worthy0) = ConvertedInsts[cast<Instruction>(I.getOperand(0))]; in convertLogicOp()
298 Mask = Mask0 & Mask1; in convertLogicOp()
301 Mask = Mask0 | Mask1; in convertLogicOp()
304 Mask = Mask0 ^ Mask1; in convertLogicOp()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-readobj/ |
| D | mips-reginfo.test | 6 CHECK-NEXT: Co-Proc Mask0: 0x0
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| D | mips-options-sec.test | 7 CHECK-NEXT: Co-Proc Mask0: 0x0
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| /external/llvm/test/tools/llvm-readobj/ |
| D | mips-reginfo.test | 6 CHECK-NEXT: Co-Proc Mask0: 0x0
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| D | mips-options-sec.test | 7 CHECK-NEXT: Co-Proc Mask0: 0x0
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 2377 SDValue Mask0 = DAG.getConstant(0x0f, MVT::i16); in LowerCTPOP() local
2398 Mask0); in LowerCTPOP()
2410 SDValue Mask0 = DAG.getConstant(0xff, MVT::i32); in LowerCTPOP() local
2445 return DAG.getNode(ISD::AND, dl, MVT::i32, Sum2, Mask0); in LowerCTPOP()
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| /external/llvm/test/CodeGen/X86/ |
| D | masked_gather_scatter.ll | 180 ; SCALAR: %Mask0 = extractelement <16 x i1> %imask, i32 0
181 ; SCALAR-NEXT: %ToStore0 = icmp eq i1 %Mask0, true
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | masked_gather_scatter.ll | 215 ; SCALAR: %Mask0 = extractelement <16 x i1> %imask, i32 0
216 ; SCALAR-NEXT: %ToStore0 = icmp eq i1 %Mask0, true
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