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Searched refs:Mask2Reg (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.cpp4755 unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
4808 BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); in EmitPartwordAtomicBinary()
4811 BuildMI(BB, dl, TII->get(PPC::ORI),Mask2Reg).addReg(Mask3Reg).addImm(65535); in EmitPartwordAtomicBinary()
4814 .addReg(Mask2Reg).addReg(ShiftReg); in EmitPartwordAtomicBinary()
5080 unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
5142 BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); in EmitInstrWithCustomInserter()
5145 BuildMI(BB, dl, TII->get(PPC::ORI), Mask2Reg) in EmitInstrWithCustomInserter()
5149 .addReg(Mask2Reg).addReg(ShiftReg); in EmitInstrWithCustomInserter()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp8546 unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
8599 BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); in EmitPartwordAtomicBinary()
8602 BuildMI(BB, dl, TII->get(PPC::ORI),Mask2Reg).addReg(Mask3Reg).addImm(65535); in EmitPartwordAtomicBinary()
8605 .addReg(Mask2Reg).addReg(ShiftReg); in EmitPartwordAtomicBinary()
9264 unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
9326 BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); in EmitInstrWithCustomInserter()
9329 BuildMI(BB, dl, TII->get(PPC::ORI), Mask2Reg) in EmitInstrWithCustomInserter()
9333 .addReg(Mask2Reg).addReg(ShiftReg); in EmitInstrWithCustomInserter()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp9843 unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
9897 BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); in EmitPartwordAtomicBinary()
9900 BuildMI(BB, dl, TII->get(PPC::ORI),Mask2Reg).addReg(Mask3Reg).addImm(65535); in EmitPartwordAtomicBinary()
9903 .addReg(Mask2Reg).addReg(ShiftReg); in EmitPartwordAtomicBinary()
10633 unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
10696 BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); in EmitInstrWithCustomInserter()
10699 BuildMI(BB, dl, TII->get(PPC::ORI), Mask2Reg) in EmitInstrWithCustomInserter()
10703 .addReg(Mask2Reg).addReg(ShiftReg); in EmitInstrWithCustomInserter()