| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | CaymanInstructions.td | 116 let DST_SEL_Y = 7; // Masked
117 let DST_SEL_Z = 7; // Masked
118 let DST_SEL_W = 7; // Masked
126 let DST_SEL_Y = 7; // Masked
127 let DST_SEL_Z = 7; // Masked
128 let DST_SEL_W = 7; // Masked
138 let DST_SEL_Y = 7; // Masked
139 let DST_SEL_Z = 7; // Masked
140 let DST_SEL_W = 7; // Masked
|
| D | EvergreenInstructions.td | 181 let DST_SEL_Y = 7; // Masked
182 let DST_SEL_Z = 7; // Masked
183 let DST_SEL_W = 7; // Masked
192 let DST_SEL_Y = 7; // Masked
193 let DST_SEL_Z = 7; // Masked
194 let DST_SEL_W = 7; // Masked
205 let DST_SEL_Y = 7; // Masked
206 let DST_SEL_Z = 7; // Masked
207 let DST_SEL_W = 7; // Masked
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | CaymanInstructions.td | 113 let DST_SEL_Y = 7; // Masked
114 let DST_SEL_Z = 7; // Masked
115 let DST_SEL_W = 7; // Masked
123 let DST_SEL_Y = 7; // Masked
124 let DST_SEL_Z = 7; // Masked
125 let DST_SEL_W = 7; // Masked
135 let DST_SEL_Y = 7; // Masked
136 let DST_SEL_Z = 7; // Masked
137 let DST_SEL_W = 7; // Masked
|
| D | EvergreenInstructions.td | 141 let DST_SEL_Y = 7; // Masked
142 let DST_SEL_Z = 7; // Masked
143 let DST_SEL_W = 7; // Masked
152 let DST_SEL_Y = 7; // Masked
153 let DST_SEL_Z = 7; // Masked
154 let DST_SEL_W = 7; // Masked
165 let DST_SEL_Y = 7; // Masked
166 let DST_SEL_Z = 7; // Masked
167 let DST_SEL_W = 7; // Masked
|
| /external/swiftshader/third_party/subzero/src/ |
| D | WasmTranslator.cpp | 483 auto *Masked = makeVariable(DestTy); in Binop() local
487 InstArithmetic::create(Func, InstArithmetic::And, Masked, Right, in Binop()
490 InstArithmetic::create(Func, InstArithmetic::Shl, Top, Left, Masked)); in Binop()
494 Ctx->getConstantInt(DestTy, BitCount), Masked)); in Binop()
509 auto *Masked = makeVariable(DestTy); in Binop() local
513 InstArithmetic::create(Func, InstArithmetic::And, Masked, Right, in Binop()
516 Top, Left, Masked)); in Binop()
520 Ctx->getConstantInt(DestTy, BitCount), Masked)); in Binop()
|
| /external/deqp/doc/testspecs/GLES2/ |
| D | functional.stencil.txt | 29 + Masked stencil comparison
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | O0-pipeline.ll | 26 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
|
| D | O3-pipeline.ll | 47 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | O0-pipeline.ll | 26 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
|
| D | O3-pipeline.ll | 41 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Hexagon/ |
| D | xtype_bit.txt | 78 # Masked parity
|
| /external/llvm/test/MC/Disassembler/Hexagon/ |
| D | xtype_bit.txt | 78 # Masked parity
|
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 1698 Value *Masked = nullptr; in FoldOrOfICmps() local
1705 Masked = Builder->CreateAnd(LAnd->getOperand(0), Mask); in FoldOrOfICmps()
1712 Masked = Builder->CreateAnd(LAnd->getOperand(1), Mask); in FoldOrOfICmps()
1715 if (Masked) in FoldOrOfICmps()
1716 return Builder->CreateICmp(ICmpInst::ICMP_NE, Masked, Mask); in FoldOrOfICmps()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/intrinsics/ |
| D | xtype_bit.ll | 217 ; Masked parity
|
| /external/llvm/test/CodeGen/Hexagon/intrinsics/ |
| D | xtype_bit.ll | 217 ; Masked parity
|
| /external/clang/lib/CodeGen/ |
| D | CGOpenMPRuntime.cpp | 6350 llvm::SmallVector<char, 2> Masked; in emitX86DeclareSimdFunction() local
6353 Masked.push_back('N'); in emitX86DeclareSimdFunction()
6354 Masked.push_back('M'); in emitX86DeclareSimdFunction()
6357 Masked.push_back('N'); in emitX86DeclareSimdFunction()
6360 Masked.push_back('M'); in emitX86DeclareSimdFunction()
6363 for (auto Mask : Masked) { in emitX86DeclareSimdFunction()
|
| /external/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 654 //===-------------------------- Masked Intrinsics -------------------------===//
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 892 Value *Masked = Builder.CreateAnd(A, Mask); in foldAndOrOfICmpsOfAndWithPow2() local
894 return Builder.CreateICmp(NewPred, Masked, Mask); in foldAndOrOfICmpsOfAndWithPow2()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Instrumentation/ |
| D | AddressSanitizer.cpp | 1372 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local
1373 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 853 //===-------------------------- Masked Intrinsics -------------------------===//
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrFragmentsSIMD.td | 969 // Masked store fragments.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrFragmentsSIMD.td | 947 // Masked store fragments.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 100 # Vector Move Immediate Masked
101 # Vector Move Inverted Immediate Masked
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 100 # Vector Move Immediate Masked
101 # Vector Move Inverted Immediate Masked
|
| /external/llvm/test/CodeGen/X86/ |
| D | vector-rotate-256.ll | 876 ; Masked Uniform Constant Rotates
|