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Searched refs:MaxMask (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DGCNRegPressure.cpp108 const auto MaxMask = MRI.getMaxLaneMaskForVReg(Reg); in inc() local
113 assert(PrevMask.none() && NewMask == MaxMask); in inc()
119 assert(NewMask < MaxMask || NewMask == MaxMask); in inc()
215 auto MaxMask = MRI.getMaxLaneMaskForVReg(MO.getReg()); in getUsedRegMask() local
216 if (MaxMask == LaneBitmask::getLane(0)) // cannot have subregs in getUsedRegMask()
217 return MaxMask; in getUsedRegMask()
DSIISelLowering.cpp6559 static const uint32_t MaxMask = 0x3ff; in performOrCombine() local
6561 uint32_t NewMask = (CLHS->getZExtValue() | CRHS->getZExtValue()) & MaxMask; in performOrCombine()
/external/llvm/lib/CodeGen/
DRegisterCoalescer.cpp1056 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(DstReg); in reMaterializeTrivialDef() local
1061 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1063 if (MaxMask != 0) { in reMaterializeTrivialDef()
1064 LiveInterval::SubRange *SR = DstInt.createSubRange(Alloc, MaxMask); in reMaterializeTrivialDef()
3038 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg); in runOnMachineFunction() local
3042 assert((S.LaneMask & ~MaxMask) == 0); in runOnMachineFunction()
DLiveInterval.cpp916 LaneBitmask MaxMask = MRI != nullptr ? MRI->getMaxLaneMaskForVReg(reg) : ~0u; in verify() local
923 assert((Mask & ~MaxMask) == 0); in verify()
DMachineVerifier.cpp1886 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg); in verifyLiveInterval() local
1892 if ((SR.LaneMask & ~MaxMask) != 0) { in verifyLiveInterval()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DRegisterCoalescer.cpp1278 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(DstReg); in reMaterializeTrivialDef() local
1283 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1285 if (MaxMask.any()) { in reMaterializeTrivialDef()
1286 LiveInterval::SubRange *SR = DstInt.createSubRange(Alloc, MaxMask); in reMaterializeTrivialDef()
3533 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg); in runOnMachineFunction() local
3537 assert((S.LaneMask & ~MaxMask).none()); in runOnMachineFunction()
DLiveInterval.cpp1034 LaneBitmask MaxMask = MRI != nullptr ? MRI->getMaxLaneMaskForVReg(reg) in verify() local
1042 assert((Mask & ~MaxMask).none()); in verify()
DMachineVerifier.cpp2185 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg); in verifyLiveInterval() local
2191 if ((SR.LaneMask & ~MaxMask).any()) { in verifyLiveInterval()
/external/llvm/utils/TableGen/
DAsmMatcherEmitter.cpp2641 unsigned MaxMask = 0; in emitCustomOperandParsing() local
2643 MaxMask |= OMI.OperandMask; in emitCustomOperandParsing()
2655 OS << " " << getMinimalTypeForRange(MaxMask) in emitCustomOperandParsing()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DAsmMatcherEmitter.cpp2828 unsigned MaxMask = 0; in emitCustomOperandParsing() local
2830 MaxMask |= OMI.OperandMask; in emitCustomOperandParsing()
2842 OS << " " << getMinimalTypeForRange(MaxMask) in emitCustomOperandParsing()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp2623 static const uint32_t MaxMask = 0x3ff; in performOrCombine() local
2625 uint32_t NewMask = (CLHS->getZExtValue() | CRHS->getZExtValue()) & MaxMask; in performOrCombine()