Searched refs:MidReg (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2832 unsigned MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local
2842 BuildMI(MBB, MII, DL, InstDesc, MidReg) in splitScalar64BitBCNT()
2848 .addReg(MidReg); in splitScalar64BitBCNT()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 4378 unsigned MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local
4388 BuildMI(MBB, MII, DL, InstDesc, MidReg).add(SrcRegSub0).addImm(0); in splitScalar64BitBCNT()
4390 BuildMI(MBB, MII, DL, InstDesc, ResultReg).add(SrcRegSub1).addReg(MidReg); in splitScalar64BitBCNT()
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