| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 130 MoveReg, enumerator
253 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 408 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToFPReg() local
410 TII.get(ARM::VMOVSR), MoveReg) in ARMMoveToFPReg()
412 return MoveReg; in ARMMoveToFPReg()
418 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToIntReg() local
420 TII.get(ARM::VMOVRS), MoveReg) in ARMMoveToIntReg()
422 return MoveReg; in ARMMoveToIntReg()
1012 unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32)); in ARMEmitLoad() local
1014 TII.get(ARM::VMOVSR), MoveReg) in ARMEmitLoad()
1016 ResultReg = MoveReg; in ARMEmitLoad()
1115 unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::i32)); in ARMEmitStore() local
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 404 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToFPReg() local
406 TII.get(ARM::VMOVSR), MoveReg) in ARMMoveToFPReg()
408 return MoveReg; in ARMMoveToFPReg()
414 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToIntReg() local
416 TII.get(ARM::VMOVRS), MoveReg) in ARMMoveToIntReg()
418 return MoveReg; in ARMMoveToIntReg()
1012 unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32)); in ARMEmitLoad() local
1014 TII.get(ARM::VMOVSR), MoveReg) in ARMEmitLoad()
1016 ResultReg = MoveReg; in ARMEmitLoad()
1116 unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::i32)); in ARMEmitStore() local
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 478 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToFPReg() local
480 TII.get(ARM::VMOVRS), MoveReg) in ARMMoveToFPReg()
482 return MoveReg; in ARMMoveToFPReg()
488 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToIntReg() local
490 TII.get(ARM::VMOVSR), MoveReg) in ARMMoveToIntReg()
492 return MoveReg; in ARMMoveToIntReg()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 1787 unsigned RestoreOp, MoveReg; in restoreCRs() local
1798 MoveReg = PPC::R12; in restoreCRs()
1803 .addReg(MoveReg, getKillRegState(!CR3Spilled && !CR4Spilled))); in restoreCRs()
1807 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
1811 .addReg(MoveReg, getKillRegState(true))); in restoreCRs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 2035 unsigned RestoreOp, MoveReg; in restoreCRs() local
2046 MoveReg = PPC::R12; in restoreCRs()
2051 .addReg(MoveReg, getKillRegState(!CR3Spilled && !CR4Spilled))); in restoreCRs()
2055 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
2059 .addReg(MoveReg, getKillRegState(true))); in restoreCRs()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenInstrInfo.inc | 4930 …{ 870, 2, 1, 4, 666, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr, …
4931 …{ 871, 2, 1, 4, 59, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr, n…
4933 …{ 873, 2, 1, 4, 509, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, …
5085 …{ 1025, 2, 1, 4, 657, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr,…
5086 …{ 1026, 2, 1, 4, 76, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr, …
5088 …{ 1028, 2, 0, 4, 509, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr,…
5263 …{ 1203, 2, 1, 4, 96, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x4ULL, nullptr, nullptr, Oper…
5271 …{ 1211, 2, 1, 4, 103, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x4ULL, nullptr, nullptr, Ope…
5497 …{ 1437, 2, 1, 4, 515, 0|(1ULL<<MCID::MoveReg), 0x4ULL, nullptr, nullptr, OperandInfo227, -1 ,nullp…
5499 …{ 1439, 2, 1, 4, 515, 0|(1ULL<<MCID::MoveReg), 0x4ULL, nullptr, nullptr, OperandInfo183, -1 ,nullp…
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 559 return hasProperty(MCID::MoveReg, Type);
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenInstrInfo.inc | 19079 …{ 1265, 2, 1, 0, 1017, 0|(1ULL<<MCID::MoveReg), 0x2410002831ULL, nullptr, nullptr, OperandInfo191,…
19084 …{ 1270, 2, 1, 0, 1017, 0|(1ULL<<MCID::MoveReg), 0x6410002831ULL, nullptr, nullptr, OperandInfo196,…
19089 …{ 1275, 2, 1, 0, 1017, 0|(1ULL<<MCID::MoveReg), 0x6410002031ULL, nullptr, nullptr, OperandInfo201,…
19094 …{ 1280, 2, 1, 0, 1017, 0|(1ULL<<MCID::MoveReg), 0x2410002031ULL, nullptr, nullptr, OperandInfo206,…
19375 …{ 1561, 2, 1, 0, 169, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x1bc0002031ULL, nullptr, nul…
19376 …{ 1562, 2, 1, 0, 169, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x1fc0002030ULL, nullptr, nul…
19550 …{ 1736, 2, 1, 0, 6, 0|(1ULL<<MCID::MoveReg), 0x22400000b0ULL, nullptr, nullptr, OperandInfo107, -1…
19551 …{ 1737, 2, 1, 0, 6, 0|(1ULL<<MCID::MoveReg), 0x22c00000b1ULL, nullptr, nullptr, OperandInfo107, -1…
19570 …{ 1756, 2, 1, 0, 6, 0|(1ULL<<MCID::MoveReg), 0x2240000130ULL, nullptr, nullptr, OperandInfo114, -1…
19571 …{ 1757, 2, 1, 0, 6, 0|(1ULL<<MCID::MoveReg), 0x22c0000131ULL, nullptr, nullptr, OperandInfo114, -1…
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenInstrInfo.inc | 5381 …{ 686, 5, 1, 4, 864, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasOptionalDef)…
6495 …{ 1800, 4, 1, 4, 566, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Predicable), 0x8780ULL, nullptr, nullpt…
6511 …{ 1816, 4, 1, 4, 575, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast)|(1ULL<<MCID::Predicable), 0x18…
6512 …{ 1817, 4, 1, 4, 567, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Predicable), 0x8780ULL, nullptr, nullpt…
6513 …{ 1818, 4, 1, 4, 576, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast)|(1ULL<<MCID::Predicable), 0x18…
7875 …{ 3180, 2, 1, 2, 864, 0|(1ULL<<MCID::MoveReg), 0xc80ULL, nullptr, ImplicitList1, OperandInfo363, -…
7877 …{ 3182, 4, 1, 2, 864, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr…
|