Searched refs:MulRHS (Results 1 – 5 of 5) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 173 SDValue MulRHS = N->getOperand(1); in Select() local
176 MulLHS, MulRHS); in Select()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 370 SDValue MulRHS = N->getOperand(1); in Select() local
373 CurDAG->getMachineNode(Opcode, dl, MVT::i32, MVT::i32, MulLHS, MulRHS); in Select()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 1222 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local
1226 std::swap(MulLHS, MulRHS); in emitAddSub()
1228 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub()
1229 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub()
1608 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local
1612 std::swap(MulLHS, MulRHS); in emitLogicalOp()
1614 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp()
1615 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 1176 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local
1180 std::swap(MulLHS, MulRHS); in emitAddSub()
1182 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub()
1183 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub()
1554 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local
1558 std::swap(MulLHS, MulRHS); in emitLogicalOp()
1560 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp()
1561 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 7366 SDValue MulRHS = LHS.getOperand(1); in performAddCombine() local
7371 numBitsUnsigned(MulRHS, DAG) <= 32) { in performAddCombine()
7373 MulRHS = DAG.getZExtOrTrunc(MulRHS, SL, MVT::i32); in performAddCombine()
7375 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); in performAddCombine()
7378 if (numBitsSigned(MulLHS, DAG) < 32 && numBitsSigned(MulRHS, DAG) < 32) { in performAddCombine()
7380 MulRHS = DAG.getSExtOrTrunc(MulRHS, SL, MVT::i32); in performAddCombine()
7382 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true); in performAddCombine()
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