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Searched refs:NDTR1CS0 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/mtd/nand/
Dpxa3xx_nand.c39 #define NDTR1CS0 (0x0C) /* Timing Parameter 1 for CS0 */ macro
336 nand_writel(info, NDTR1CS0, ndtr1); in pxa3xx_nand_set_timing()
375 nand_writel(info, NDTR1CS0, ndtr1); in pxa3xx_nand_set_sdr_timing()
928 nand_writel(info, NDTR1CS0, info->ndtr1cs0); in nand_cmdfunc()
989 nand_writel(info, NDTR1CS0, info->ndtr1cs0); in nand_cmdfunc_extended()
1255 info->ndtr1cs0 = nand_readl(info, NDTR1CS0); in pxa3xx_nand_detect_config()
/external/u-boot/arch/arm/include/asm/arch-pxa/
Dpxa-regs.h2337 #define NDTR1CS0 0x4310000C /* Data Controller Timing Parameter 1 Register for ND_nCS0 */ macro