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Searched refs:NEG1 (Results 1 – 4 of 4) sorted by relevance

/external/ltp/testcases/kernel/mem/mmapstress/
Dmmapstress03.c65 #define NEG1 (char *)-1 macro
75 if ((brk_start = sbrk(0)) == NEG1) { in main()
81 == NEG1) { in main()
88 if ((hole_addr = hole_start = sbrk(NUM_SEGS * 2 * pagesize)) == NEG1) { in main()
92 if ((brk_max_addr = sbrk(0)) == NEG1) { in main()
114 if (sbrk(-NUM_SEGS * pagesize) == NEG1) { in main()
118 if ((brk_max_addr = sbrk(0)) == NEG1) { in main()
138 if (sbrk(pagesize) == NEG1 || sbrk(-pagesize) == NEG1) { in main()
182 if (sbrk(pagesize) == NEG1) { in do_test()
186 if (sbrk(-pagesize) == NEG1) { in do_test()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.rsq.clamp.ll26 ; VI-DAG: s_mov_b32 [[NEG1:s[0-9+]]], -1
27 ; VI-DAG: s_mov_b32 s[[LOW1:[0-9+]]], [[NEG1]]
Dsminmax.ll78 ; SIVI-DAG: v_sub_{{i|u}}32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
81 ; GFX9-DAG: v_sub_u32_e32 [[NEG1:v[0-9]+]], 0, [[SRC1:v[0-9]+]]
84 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC1]], [[NEG1]]
144 ; SIVI-DAG: v_sub_{{i|u}}32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
149 ; GFX9-DAG: v_sub_u32_e32 [[NEG1:v[0-9]+]], 0, [[SRC1:v[0-9]+]]
154 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC1]], [[NEG1]]
/external/llvm/test/CodeGen/AMDGPU/
Dsminmax.ll58 ; GCN-DAG: v_sub_i32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
61 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[NEG1]], [[SRC1]]
117 ; GCN-DAG: v_sub_i32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
122 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[NEG1]], [[SRC1]]