Searched refs:NEG_D (Results 1 – 10 of 10) sorted by relevance
| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 352 NEG_D = 4, enumerator
1020 return Latency::NEG_D; in NegdLatency()
1023 return CompareIsNanF64Latency() + 2 * Latency::BRANCH + Latency::NEG_D + in NegdLatency()
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| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 321 NEG_D = 4, enumerator
1087 return Latency::NEG_D; in Neg_dLatency()
1090 return CompareIsNanF64Latency() + 2 * Latency::BRANCH + Latency::NEG_D + in Neg_dLatency()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 634 NEG_D = ((0U << 3) + 7), enumerator
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| D | disasm-mips.cc | 1078 case NEG_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips.cc | 2854 GenInstrRegister(COP1, D, f0, fs, fd, NEG_D); in neg_d()
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| D | simulator-mips.cc | 2812 case NEG_D: in DecodeTypeRegisterDRsType()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 664 NEG_D = ((0U << 3) + 7), enumerator
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| D | disasm-mips64.cc | 1151 case NEG_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips64.cc | 3245 GenInstrRegister(COP1, S, f0, fs, fd, NEG_D); in neg_s()
3250 GenInstrRegister(COP1, D, f0, fs, fd, NEG_D); in neg_d()
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| D | simulator-mips64.cc | 3130 case NEG_D: in DecodeTypeRegisterDRsType()
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