Searched refs:NUM_TX_DESC (Results 1 – 6 of 6) sorted by relevance
117 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro119 #define NUM_TX_DESC 4 macro136 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …344 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()350 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()357 txRingSize = NUM_TX_DESC; in dc21x4x_init()419 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()517 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
85 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro317 DEFINE_ALIGN_BUFFER(u8, txb, NUM_TX_DESC * RX_BUF_SIZE, RTL8169_ALIGN);336 unsigned char *Tx_skbuff[NUM_TX_DESC];613 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send_common()642 if (entry != (NUM_TX_DESC - 1)) { in rtl_send_common()818 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()821 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()1092 tpc->TxDescArray = rtl_alloc_descs(NUM_TX_DESC); in rtl_init()
192 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro199 static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */521 tx_next = ((tx_next + 1) % NUM_TX_DESC); in eepro100_init()557 tx_next = ((tx_next + 1) % NUM_TX_DESC); in eepro100_init()608 tx_next = (tx_next + 1) % NUM_TX_DESC; in eepro100_send()897 for (i = 0; i < NUM_TX_DESC; i++) { in purge_tx_ring()
93 #define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */ macro447 cur_tx = (cur_tx + 1) % NUM_TX_DESC; in rtl_transmit()
114 if (port_info->tx_desc_cur >= port_info->tx_desc_base + NUM_TX_DESC) in sh_eth_send_common()193 u32 alloc_desc_size = NUM_TX_DESC * sizeof(struct tx_desc_s); in sh_eth_tx_desc_init()217 for (cur_tx_desc = port_info->tx_desc_base, i = 0; i < NUM_TX_DESC; in sh_eth_tx_desc_init()
50 #define NUM_TX_DESC 8 macro