/external/vixl/test/aarch32/ |
D | test-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc | 169 {NZCVFlag, 0xffffffff, 0xffffffff}, {ZVFlag, 0xffffffff, 0xffffffff}, 182 {NZCVFlag, 0xffff8001, 0xffff8001}, {NZCFlag, 0xffffffff, 0xffffffff}, 194 {CFlag, 0xffff8001, 0xffff8001}, {NZCVFlag, 0xfffffffd, 0xfffffffd}, 202 {NCFlag, 0x00007fff, 0x00007fff}, {NZCVFlag, 0xffffff81, 0xffffff81}, 210 {NZCVFlag, 0xfffffffe, 0xfffffffe}, {NCFlag, 0xffff8000, 0xffff8000}, 212 {CFlag, 0xffffff82, 0xffffff82}, {NZCVFlag, 0x00007ffd, 0x00007ffd}, 216 {NZCFlag, 0xfffffffe, 0xfffffffe}, {NZCVFlag, 0x7ffffffd, 0x7ffffffd}, 220 {NZCVFlag, 0xffff8003, 0xffff8003}, {NVFlag, 0x00007ffe, 0x00007ffe}, 238 {NZCVFlag, 0x00000000, 0x00000000}, {CVFlag, 0x55555555, 0x55555555}, 244 {NZCVFlag, 0x0000007d, 0x0000007d}, {NVFlag, 0xffffff82, 0xffffff82}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 208 {NZCVFlag, 0xabababab, 0xabababab, 0xabababab}}; 224 {NZCVFlag, 0x00007ffe, 0x00007ffe, 0xfffffffe}, 227 {NZCVFlag, 0x00000002, 0x00000002, 0xfffffffd}, 229 {NZCVFlag, 0xfffffffd, 0xfffffffd, 0x00007ffe}, 233 {NZCVFlag, 0x00007fff, 0x00007fff, 0x00007ffd}, 234 {NZCVFlag, 0x55555555, 0x55555555, 0xffffff82}, 270 {NZCVFlag, 0x0000007e, 0x0000007e, 0x33333333}, 288 {NZCVFlag, 0x7ffffffd, 0x7ffffffd, 0x0000007e}, 296 {NZCVFlag, 0x00000002, 0x00000002, 0x33333333}, 318 {NZCVFlag, 0x00007ffd, 0x00007ffd, 0x00000000}, [all …]
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D | test-utils-aarch32.h | 77 const uint32_t NZCVFlag = NFlag | ZFlag | CFlag | VFlag; variable 159 return dump_.flags_ & NZCVFlag; in flags_nzcv()
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D | test-utils-aarch32.cc | 188 VIXL_ASSERT((expected & ~NZCVFlag) == 0); in EqualNzcv() 189 VIXL_ASSERT((result & ~NZCVFlag) == 0); in EqualNzcv()
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D | test-simulator-cond-rd-operand-const-a32.cc | 178 {NZCVFlag, 0xabababab}}; 534 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-imm16-t32.cc | 172 {NZCVFlag, 0xabababab}}; 487 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-const-t32.cc | 178 {NZCVFlag, 0xabababab}}; 649 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 179 {NZCVFlag, 0xabababab, 0xabababab}}; 637 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-t32.cc | 185 {NZCVFlag, 0xabababab, 0xabababab}}; 572 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-a32.cc | 185 {NZCVFlag, 0xabababab, 0xabababab}}; 572 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 179 {NZCVFlag, 0xabababab, 0xabababab}}; 637 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-sel-t32.cc | 462 __ And(saved_nzcv_bits, saved_nzcv_bits, NZCVFlag); in TestHelper() 485 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 176 {NZCVFlag, 0xabababab, 0xabababab, 0xabababab}}; 955 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-sel-a32.cc | 462 __ And(saved_nzcv_bits, saved_nzcv_bits, NZCVFlag); in TestHelper() 485 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-q-t32.cc | 469 __ And(saved_nzcv_bits, saved_nzcv_bits, NZCVFlag); in TestHelper() 492 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-q-a32.cc | 469 __ And(saved_nzcv_bits, saved_nzcv_bits, NZCVFlag); in TestHelper() 492 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-ge-t32.cc | 485 __ And(saved_nzcv_bits, saved_nzcv_bits, NZCVFlag); in TestHelper() 508 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-ge-a32.cc | 485 __ And(saved_nzcv_bits, saved_nzcv_bits, NZCVFlag); in TestHelper() 508 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 181 {NZCVFlag, 0xabababab, 0xabababab}}; 941 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 208 {NZCVFlag, 0xabababab, 0xabababab, 0xabababab}}; 1172 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 181 {NZCVFlag, 0xabababab, 0xabababab}}; 941 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 181 {NZCVFlag, 0xabababab, 0xabababab}}; 931 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 181 {NZCVFlag, 0xabababab, 0xabababab}}; 931 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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D | test-simulator-cond-rd-rn-t32.cc | 178 {NZCVFlag, 0xabababab, 0xabababab}}; 920 __ And(nzcv_bits, nzcv_bits, NZCVFlag); in TestHelper()
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/external/vixl/test/aarch64/ |
D | test-utils-aarch64.cc | 271 VIXL_ASSERT((expected & ~NZCVFlag) == 0); in EqualNzcv() 272 VIXL_ASSERT((result & ~NZCVFlag) == 0); in EqualNzcv()
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