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Searched refs:NewSuperReg (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/CodeGen/
DAggressiveAntiDepBreaker.cpp640 const unsigned NewSuperReg = Order[R]; in FindSuitableFreeRegisters() local
642 if (!RegClassInfo.isAllocatable(NewSuperReg)) continue; in FindSuitableFreeRegisters()
644 if (NewSuperReg == SuperReg) continue; in FindSuitableFreeRegisters()
646 DEBUG(dbgs() << " [" << TRI->getName(NewSuperReg) << ':'); in FindSuitableFreeRegisters()
656 NewReg = NewSuperReg; in FindSuitableFreeRegisters()
660 NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx); in FindSuitableFreeRegisters()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DAggressiveAntiDepBreaker.cpp649 const unsigned NewSuperReg = Order[R]; in FindSuitableFreeRegisters() local
651 if (!MRI.isAllocatable(NewSuperReg)) continue; in FindSuitableFreeRegisters()
653 if (NewSuperReg == SuperReg) continue; in FindSuitableFreeRegisters()
655 LLVM_DEBUG(dbgs() << " [" << printReg(NewSuperReg, TRI) << ':'); in FindSuitableFreeRegisters()
665 NewReg = NewSuperReg; in FindSuitableFreeRegisters()
669 NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx); in FindSuitableFreeRegisters()
/external/llvm/lib/CodeGen/
DAggressiveAntiDepBreaker.cpp630 const unsigned NewSuperReg = Order[R]; in FindSuitableFreeRegisters() local
632 if (!MRI.isAllocatable(NewSuperReg)) continue; in FindSuitableFreeRegisters()
634 if (NewSuperReg == SuperReg) continue; in FindSuitableFreeRegisters()
636 DEBUG(dbgs() << " [" << TRI->getName(NewSuperReg) << ':'); in FindSuitableFreeRegisters()
646 NewReg = NewSuperReg; in FindSuitableFreeRegisters()
650 NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx); in FindSuitableFreeRegisters()
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp1922 unsigned NewSuperReg = MRI.createVirtualRegister(SuperRC); in buildExtractSubReg() local
1924 BuildMI(*MBB, MI, DL, get(TargetOpcode::COPY), NewSuperReg) in buildExtractSubReg()
1928 .addReg(NewSuperReg, 0, SubIdx); in buildExtractSubReg()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp3120 unsigned NewSuperReg = MRI.createVirtualRegister(SuperRC); in buildExtractSubReg() local
3122 BuildMI(*MBB, MI, DL, get(TargetOpcode::COPY), NewSuperReg) in buildExtractSubReg()
3126 .addReg(NewSuperReg, 0, SubIdx); in buildExtractSubReg()