Searched refs:NextVT (Results 1 – 5 of 5) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 1407 EVT NextVT; in WidenVecRes_Binary() local 1410 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize); in WidenVecRes_Binary() 1411 } while (!TLI.isTypeLegal(NextVT)); in WidenVecRes_Binary() 1415 SDValue VecOp = DAG.getUNDEF(NextVT); in WidenVecRes_Binary() 1418 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, in WidenVecRes_Binary() 1436 NextVT, &SubConcatOps[0], in WidenVecRes_Binary()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 2498 EVT NextVT; in WidenVecRes_BinaryCanTrap() local 2501 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize); in WidenVecRes_BinaryCanTrap() 2502 } while (!TLI.isTypeLegal(NextVT)); in WidenVecRes_BinaryCanTrap() 2506 SDValue VecOp = DAG.getUNDEF(NextVT); in WidenVecRes_BinaryCanTrap() 2510 ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, ConcatOps[OpIdx], in WidenVecRes_BinaryCanTrap() 2528 NextVT, SubConcatOps); in WidenVecRes_BinaryCanTrap()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 2290 EVT NextVT; in WidenVecRes_BinaryCanTrap() local 2293 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize); in WidenVecRes_BinaryCanTrap() 2294 } while (!TLI.isTypeLegal(NextVT)); in WidenVecRes_BinaryCanTrap() 2298 SDValue VecOp = DAG.getUNDEF(NextVT); in WidenVecRes_BinaryCanTrap() 2302 ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, ConcatOps[OpIdx], in WidenVecRes_BinaryCanTrap() 2320 NextVT, SubConcatOps); in WidenVecRes_BinaryCanTrap()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 19076 MVT NextVT = MVT::getVectorVT(NextSVT, CurrNumElts / 2); in LowerVectorCTLZInRegLUT() local 19077 SDValue Shift = DAG.getConstant(CurrScalarSizeInBits, DL, NextVT); in LowerVectorCTLZInRegLUT() 19082 HiZ = DAG.getBitcast(NextVT, HiZ); in LowerVectorCTLZInRegLUT() 19087 SDValue ResNext = Res = DAG.getBitcast(NextVT, Res); in LowerVectorCTLZInRegLUT() 19088 SDValue R0 = DAG.getNode(ISD::SRL, DL, NextVT, ResNext, Shift); in LowerVectorCTLZInRegLUT() 19089 SDValue R1 = DAG.getNode(ISD::SRL, DL, NextVT, HiZ, Shift); in LowerVectorCTLZInRegLUT() 19090 R1 = DAG.getNode(ISD::AND, DL, NextVT, ResNext, R1); in LowerVectorCTLZInRegLUT() 19091 Res = DAG.getNode(ISD::ADD, DL, NextVT, R0, R1); in LowerVectorCTLZInRegLUT() 19092 CurrVT = NextVT; in LowerVectorCTLZInRegLUT()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 22287 MVT NextVT = MVT::getVectorVT(NextSVT, CurrNumElts / 2); in LowerVectorCTLZInRegLUT() local 22288 SDValue Shift = DAG.getConstant(CurrScalarSizeInBits, DL, NextVT); in LowerVectorCTLZInRegLUT() 22300 HiZ = DAG.getBitcast(NextVT, HiZ); in LowerVectorCTLZInRegLUT() 22305 SDValue ResNext = Res = DAG.getBitcast(NextVT, Res); in LowerVectorCTLZInRegLUT() 22306 SDValue R0 = DAG.getNode(ISD::SRL, DL, NextVT, ResNext, Shift); in LowerVectorCTLZInRegLUT() 22307 SDValue R1 = DAG.getNode(ISD::SRL, DL, NextVT, HiZ, Shift); in LowerVectorCTLZInRegLUT() 22308 R1 = DAG.getNode(ISD::AND, DL, NextVT, ResNext, R1); in LowerVectorCTLZInRegLUT() 22309 Res = DAG.getNode(ISD::ADD, DL, NextVT, R0, R1); in LowerVectorCTLZInRegLUT() 22310 CurrVT = NextVT; in LowerVectorCTLZInRegLUT()
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