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Searched refs:NoRegLog (Results 1 – 5 of 5) sorted by relevance

/external/vixl/src/aarch64/
Dsimulator-aarch64.cc1423 WriteWRegister(srcdst, Memory::Read<uint8_t>(address), NoRegLog); in LoadStoreHelper()
1426 WriteWRegister(srcdst, Memory::Read<uint16_t>(address), NoRegLog); in LoadStoreHelper()
1429 WriteWRegister(srcdst, Memory::Read<uint32_t>(address), NoRegLog); in LoadStoreHelper()
1432 WriteXRegister(srcdst, Memory::Read<uint64_t>(address), NoRegLog); in LoadStoreHelper()
1435 WriteWRegister(srcdst, Memory::Read<int8_t>(address), NoRegLog); in LoadStoreHelper()
1438 WriteWRegister(srcdst, Memory::Read<int16_t>(address), NoRegLog); in LoadStoreHelper()
1441 WriteXRegister(srcdst, Memory::Read<int8_t>(address), NoRegLog); in LoadStoreHelper()
1444 WriteXRegister(srcdst, Memory::Read<int16_t>(address), NoRegLog); in LoadStoreHelper()
1447 WriteXRegister(srcdst, Memory::Read<int32_t>(address), NoRegLog); in LoadStoreHelper()
1450 WriteBRegister(srcdst, Memory::Read<uint8_t>(address), NoRegLog); in LoadStoreHelper()
[all …]
Dsimulator-aarch64.h841 enum RegLogMode { LogRegWrites, NoRegLog };
/external/v8/src/arm64/
Dsimulator-arm64.cc1927 set_qreg(rt, MemoryRead<qreg_t>(address), NoRegLog); in LoadStorePairHelper()
1928 set_qreg(rt2, MemoryRead<qreg_t>(address2), NoRegLog); in LoadStorePairHelper()
Dsimulator-arm64.h816 enum RegLogMode { LogRegWrites, NoRegLog }; enumerator
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2851 simulator.WriteRegister(i, initial_base_u64 * i, Simulator::NoRegLog); in TraceTestHelper()