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Searched refs:NumDefs (Results 1 – 25 of 59) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizationArtifactCombiner.h141 unsigned NumDefs = MI.getNumOperands() - 1; in tryCombineMerges() local
143 MI.getOperand(NumDefs).getReg(), MRI); in tryCombineMerges()
149 if (NumMergeRegs < NumDefs) { in tryCombineMerges()
150 if (NumDefs % NumMergeRegs != 0) in tryCombineMerges()
161 const unsigned NewNumDefs = NumDefs / NumMergeRegs; in tryCombineMerges()
171 } else if (NumMergeRegs > NumDefs) { in tryCombineMerges()
172 if (NumMergeRegs % NumDefs != 0) in tryCombineMerges()
183 const unsigned NumRegs = NumMergeRegs / NumDefs; in tryCombineMerges()
184 for (unsigned DefIdx = 0; DefIdx < NumDefs; ++DefIdx) { in tryCombineMerges()
200 for (unsigned Idx = 0; Idx < NumDefs; ++Idx) in tryCombineMerges()
/external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/
DAsmPrinterInlineAsm.cpp147 unsigned NumDefs = 0; in EmitInlineAsm() local
148 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in EmitInlineAsm()
149 ++NumDefs) in EmitInlineAsm()
150 assert(NumDefs != NumOperands-2 && "No asm string?"); in EmitInlineAsm()
152 assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?"); in EmitInlineAsm()
155 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in EmitInlineAsm()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DPeepholeOptimizer.cpp269 unsigned NumDefs = MI->getDesc().getNumDefs(); in OptimizeBitcastInstr() local
270 unsigned NumSrcs = MI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr()
271 if (NumDefs != 1) in OptimizeBitcastInstr()
276 for (unsigned i = 0, e = NumDefs + NumSrcs; i != e; ++i) { in OptimizeBitcastInstr()
299 NumDefs = DefMI->getDesc().getNumDefs(); in OptimizeBitcastInstr()
300 NumSrcs = DefMI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr()
301 if (NumDefs != 1) in OptimizeBitcastInstr()
303 for (unsigned i = 0, e = NumDefs + NumSrcs; i != e; ++i) { in OptimizeBitcastInstr()
DMachineCSE.cpp424 unsigned NumDefs = MI->getDesc().getNumDefs(); in ProcessBlock() local
425 for (unsigned i = 0, e = MI->getNumOperands(); NumDefs && i != e; ++i) { in ProcessBlock()
452 --NumDefs; in ProcessBlock()
/external/llvm/lib/CodeGen/AsmPrinter/
DAsmPrinterInlineAsm.cpp434 unsigned NumDefs = 0; in EmitInlineAsm() local
435 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in EmitInlineAsm()
436 ++NumDefs) in EmitInlineAsm()
437 assert(NumDefs != MI->getNumOperands()-2 && "No asm string?"); in EmitInlineAsm()
439 assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?"); in EmitInlineAsm()
442 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in EmitInlineAsm()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/AsmPrinter/
DAsmPrinterInlineAsm.cpp464 unsigned NumDefs = 0; in EmitInlineAsm() local
465 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in EmitInlineAsm()
466 ++NumDefs) in EmitInlineAsm()
467 assert(NumDefs != MI->getNumOperands()-2 && "No asm string?"); in EmitInlineAsm()
469 assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?"); in EmitInlineAsm()
472 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in EmitInlineAsm()
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/
DMachineInstrTest.cpp107 unsigned char NumDefs = 1; in TEST() local
112 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST()
176 unsigned char NumDefs = 1; in TEST() local
181 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST()
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp753 unsigned NumDefs = II.getNumDefs(); in EmitMachineNode() local
764 NumDefs = NumResults; in EmitMachineNode()
771 countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses); in EmitMachineNode()
772 bool HasPhysRegOuts = NumResults > NumDefs && II.getImplicitDefs()!=nullptr; in EmitMachineNode()
795 bool HasOptPRefs = NumDefs > NumResults; in EmitMachineNode()
798 unsigned NumSkip = HasOptPRefs ? NumDefs - NumResults : 0; in EmitMachineNode()
800 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II, in EmitMachineNode()
837 for (unsigned i = NumDefs; i < NumResults; ++i) { in EmitMachineNode()
838 unsigned Reg = II.getImplicitDefs()[i - NumDefs]; in EmitMachineNode()
DScheduleDAGRRList.cpp1973 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local
1974 for (unsigned i = 0; i != NumDefs; ++i) { in MayReduceRegPressure()
2019 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local
2020 for (unsigned i = 0; i != NumDefs; ++i) { in RegPressureDiff()
2147 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2148 for (unsigned i = 0; i != NumDefs; ++i) { in unscheduledNode()
2164 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2165 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in unscheduledNode()
2733 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local
2745 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in canClobberPhysRegDefs()
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/external/swiftshader/third_party/LLVM/include/llvm/MC/
DMCInstrDesc.h137 unsigned short NumDefs; // Num of args that are definitions variable
184 return NumDefs; in getNumDefs()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DImplicitNullChecks.cpp618 unsigned NumDefs = MI->getDesc().getNumDefs(); in insertFaultingInstr() local
619 assert(NumDefs <= 1 && "other cases unhandled!"); in insertFaultingInstr()
622 if (NumDefs != 0) { in insertFaultingInstr()
624 assert(NumDefs == 1 && "expected exactly one def!"); in insertFaultingInstr()
DMachineCSE.cpp553 unsigned NumDefs = MI->getNumDefs(); in ProcessBlock() local
555 for (unsigned i = 0, e = MI->getNumOperands(); NumDefs && i != e; ++i) { in ProcessBlock()
573 --NumDefs; in ProcessBlock()
598 --NumDefs; in ProcessBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp808 unsigned NumDefs = II.getNumDefs(); in EmitMachineNode() local
819 NumDefs = NumResults; in EmitMachineNode()
826 countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses); in EmitMachineNode()
827 bool HasPhysRegOuts = NumResults > NumDefs && II.getImplicitDefs()!=nullptr; in EmitMachineNode()
875 bool HasOptPRefs = NumDefs > NumResults; in EmitMachineNode()
878 unsigned NumSkip = HasOptPRefs ? NumDefs - NumResults : 0; in EmitMachineNode()
880 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II, in EmitMachineNode()
917 for (unsigned i = NumDefs; i < NumResults; ++i) { in EmitMachineNode()
918 unsigned Reg = II.getImplicitDefs()[i - NumDefs]; in EmitMachineNode()
DScheduleDAGRRList.cpp2097 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local
2098 for (unsigned i = 0; i != NumDefs; ++i) { in MayReduceRegPressure()
2143 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local
2144 for (unsigned i = 0; i != NumDefs; ++i) { in RegPressureDiff()
2272 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2273 for (unsigned i = 0; i != NumDefs; ++i) { in unscheduledNode()
2289 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2290 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in unscheduledNode()
2860 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local
2872 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in canClobberPhysRegDefs()
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/external/llvm/include/llvm/MC/
DMCInstrDesc.h142 unsigned char NumDefs; // Num of args that are definitions variable
191 unsigned getNumDefs() const { return NumDefs; } in getNumDefs()
/external/llvm/lib/CodeGen/
DImplicitNullChecks.cpp492 unsigned NumDefs = LoadMI->getDesc().getNumDefs(); in insertFaultingLoad() local
493 assert(NumDefs <= 1 && "other cases unhandled!"); in insertFaultingLoad()
496 if (NumDefs != 0) { in insertFaultingLoad()
DMachineCSE.cpp532 unsigned NumDefs = MI->getDesc().getNumDefs() + in ProcessBlock() local
535 for (unsigned i = 0, e = MI->getNumOperands(); NumDefs && i != e; ++i) { in ProcessBlock()
553 --NumDefs; in ProcessBlock()
577 --NumDefs; in ProcessBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/
DMCInstrDesc.h166 unsigned char NumDefs; // Num of args that are definitions variable
224 unsigned getNumDefs() const { return NumDefs; } in getNumDefs()
/external/swiftshader/third_party/LLVM/utils/TableGen/
DCodeGenInstruction.cpp41 NumDefs = OutDI->getNumArgs(); in CGIOperandList()
55 if (i < NumDefs) { in CGIOperandList()
59 ArgInit = InDI->getArg(i-NumDefs); in CGIOperandList()
60 ArgName = InDI->getArgName(i-NumDefs); in CGIOperandList()
/external/capstone/
DMCInstrDesc.h126 unsigned char NumDefs; // Num of args that are definitions member
/external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/
DMCInstrDesc.cpp65 for (int i = 0, e = NumDefs; i != e; ++i) in hasDefOfPhysReg()
/external/llvm/lib/MC/
DMCInstrDesc.cpp65 for (int i = 0, e = NumDefs; i != e; ++i) in hasDefOfPhysReg()
/external/llvm/utils/TableGen/
DCodeGenInstruction.cpp41 NumDefs = OutDI->getNumArgs(); in CGIOperandList()
57 if (i < NumDefs) { in CGIOperandList()
61 ArgInit = InDI->getArg(i-NumDefs); in CGIOperandList()
62 ArgName = InDI->getArgName(i-NumDefs); in CGIOperandList()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DCodeGenInstruction.cpp41 NumDefs = OutDI->getNumArgs(); in CGIOperandList()
57 if (i < NumDefs) { in CGIOperandList()
61 ArgInit = InDI->getArg(i-NumDefs); in CGIOperandList()
62 ArgName = InDI->getArgNameStr(i-NumDefs); in CGIOperandList()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DScheduleDAGRRList.cpp1863 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local
1864 for (unsigned i = 0; i != NumDefs; ++i) { in MayReduceRegPressure()
1910 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local
1911 for (unsigned i = 0; i != NumDefs; ++i) { in RegPressureDiff()
2040 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in UnscheduledNode() local
2041 for (unsigned i = 0; i != NumDefs; ++i) { in UnscheduledNode()
2057 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in UnscheduledNode() local
2058 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in UnscheduledNode()
2663 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local
2674 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in canClobberPhysRegDefs()
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