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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpr32284.ll2 …: llc -fast-isel-sink-local-values -O0 -mtriple=x86_64-unknown -mcpu=skx -o - %s | FileCheck %s --…
4 …: llc -fast-isel-sink-local-values -O0 -mtriple=i686-unknown -mcpu=skx -o - %s | FileCheck %s --…
10 ; X86-O0-LABEL: foo:
11 ; X86-O0: # %bb.0: # %entry
12 ; X86-O0-NEXT: xorl %eax, %eax
13 ; X86-O0-NEXT: movl %eax, %ecx
14 ; X86-O0-NEXT: xorl %eax, %eax
15 ; X86-O0-NEXT: movzbl c, %edx
16 ; X86-O0-NEXT: subl %edx, %eax
17 ; X86-O0-NEXT: movslq %eax, %rsi
[all …]
Dcxx_tlscc64.ll7 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s --check-prefix=CHECK-O0
43 ; CHECK-O0-LABEL: _ZTW2sg
44 ; CHECK-O0: pushq %r11
45 ; CHECK-O0: pushq %r10
46 ; CHECK-O0: pushq %r9
47 ; CHECK-O0: pushq %r8
48 ; CHECK-O0: pushq %rsi
49 ; CHECK-O0: pushq %rdx
50 ; CHECK-O0: pushq %rcx
51 ; CHECK-O0: callq
[all …]
Dswift-return.ll3 …erify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck --check-prefix=CHECK-O0 %s
24 ; CHECK-O0-LABEL: test:
25 ; CHECK-O0: # %bb.0: # %entry
26 ; CHECK-O0-NEXT: pushq %rax
27 ; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
28 ; CHECK-O0-NEXT: movl %edi, {{[0-9]+}}(%rsp)
29 ; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi
30 ; CHECK-O0-NEXT: callq gen
31 ; CHECK-O0-NEXT: movswl %ax, %edi
32 ; CHECK-O0-NEXT: movsbl %dl, %ecx
[all …]
Dswifterror.ll2 ; RUN: llc -verify-machineinstrs -O0 < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=C…
18 ; CHECK-O0-LABEL: foo:
19 ; CHECK-O0: movl $16
20 ; CHECK-O0: malloc
21 ; CHECK-O0: movb $1, 8(%rax)
22 ; CHECK-O0: movq %{{.*}}, %r12
44 ; CHECK-O0-LABEL: caller:
45 ; CHECK-O0: xorl
46 ; CHECK-O0: movl %{{.*}}, %r12d
47 ; CHECK-O0: callq {{.*}}foo
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dcxx-tlscc.ll6 ; RUN: llc < %s -mtriple=aarch64-apple-ios -O0 -fast-isel | FileCheck --check-prefix=CHECK-O0 %s
83 ; CHECK-O0-LABEL: _ZTW2sg
84 ; CHECK-O0: stp d31, d30
85 ; CHECK-O0: stp d29, d28
86 ; CHECK-O0: stp d27, d26
87 ; CHECK-O0: stp d25, d24
88 ; CHECK-O0: stp d23, d22
89 ; CHECK-O0: stp d21, d20
90 ; CHECK-O0: stp d19, d18
91 ; CHECK-O0: stp d17, d16
[all …]
Dswifterror.ll2 …le-fp-elim -O0 -fast-isel < %s -mtriple=aarch64-apple-ios -disable-post-ra | FileCheck -allow-depr…
19 ; CHECK-O0-LABEL: foo:
20 ; CHECK-O0: orr w{{.*}}, wzr, #0x10
21 ; CHECK-O0: malloc
22 ; CHECK-O0: mov x21, x0
23 ; CHECK-O0-NOT: x21
24 ; CHECK-O0: orr [[ID:w[0-9]+]], wzr, #0x1
25 ; CHECK-O0-NOT: x21
26 ; CHECK-O0: strb [[ID]], [x0, #8]
27 ; CHECK-O0-NOT: x21
[all …]
Dswift-return.ll2 ; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s -…
8 ; CHECK-O0-LABEL: test1
9 ; CHECK-O0: bl _gen
10 ; CHECK-O0: sxth [[TMP:w.*]], w0
11 ; CHECK-O0: add w0, [[TMP]], w1, sxtb
32 ; CHECK-O0-LABEL: test2
33 ; CHECK-O0: bl _gen2
34 ; CHECK-O0: add [[TMP:x.*]], x0, x1
35 ; CHECK-O0: add [[TMP]], [[TMP]], x2
36 ; CHECK-O0: add [[TMP]], [[TMP]], x3
[all …]
/external/llvm/test/CodeGen/AArch64/
Dcxx-tlscc.ll6 ; RUN: llc < %s -mtriple=aarch64-apple-ios -O0 | FileCheck --check-prefix=CHECK-O0 %s
83 ; CHECK-O0-LABEL: _ZTW2sg
84 ; CHECK-O0: stp d31, d30
85 ; CHECK-O0: stp d29, d28
86 ; CHECK-O0: stp d27, d26
87 ; CHECK-O0: stp d25, d24
88 ; CHECK-O0: stp d23, d22
89 ; CHECK-O0: stp d21, d20
90 ; CHECK-O0: stp d19, d18
91 ; CHECK-O0: stp d17, d16
[all …]
Dswifterror.ll2 …-machineinstrs -disable-fp-elim -O0 < %s -mtriple=aarch64-apple-ios -disable-post-ra | FileCheck -…
19 ; CHECK-O0-LABEL: foo:
20 ; CHECK-O0: orr w{{.*}}, wzr, #0x10
21 ; CHECK-O0: malloc
22 ; CHECK-O0: mov [[ID2:x[0-9]+]], x0
23 ; CHECK-O0: orr [[ID:w[0-9]+]], wzr, #0x1
24 ; CHECK-O0: strb [[ID]], [x0, #8]
25 ; CHECK-O0: mov x19, [[ID2]]
26 ; CHECK-O0-NOT: x19
49 ; CHECK-O0-LABEL: caller:
[all …]
/external/llvm/test/CodeGen/X86/
Dcxx_tlscc64.ll7 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s --check-prefix=CHECK-O0
43 ; CHECK-O0-LABEL: _ZTW2sg
44 ; CHECK-O0: pushq %r11
45 ; CHECK-O0: pushq %r10
46 ; CHECK-O0: pushq %r9
47 ; CHECK-O0: pushq %r8
48 ; CHECK-O0: pushq %rsi
49 ; CHECK-O0: pushq %rdx
50 ; CHECK-O0: pushq %rcx
51 ; CHECK-O0: callq
[all …]
Dswifterror.ll2 ; RUN: llc -verify-machineinstrs -O0 < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=C…
17 ; CHECK-O0-LABEL: foo:
18 ; CHECK-O0: movl $16
19 ; CHECK-O0: malloc
20 ; CHECK-O0: movb $1, 8(%rax)
21 ; CHECK-O0: movq %{{.*}}, %r12
43 ; CHECK-O0-LABEL: caller:
44 ; CHECK-O0: xorl
45 ; CHECK-O0: movl %{{.*}}, %r12d
46 ; CHECK-O0: callq {{.*}}foo
[all …]
Dswift-return.ll2 …erify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck --check-prefix=CHECK-O0 %s
13 ; CHECK-O0-LABEL: test
14 ; CHECK-O0: movl %edi
15 ; CHECK-O0: callq gen
16 ; CHECK-O0: movswl %ax
17 ; CHECK-O0: movsbl %dl
18 ; CHECK-O0: addl
19 ; CHECK-O0: movw %{{.*}}, %ax
48 ; CHECK-O0-LABEL: test2:
49 ; CHECK-O0-DAG: leaq (%rsp), %rax
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dsubtarget-no-movt.ll4 …: llc -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION-O0
5 …cpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-no-movt | FileCheck -check-prefix=USE-M…
6 …pu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+no-movt | FileCheck -check-prefix=NO-USE…
15 ; NO-OPTION-O0-LABEL: {{_?}}foo0
16 ; NO-OPTION-O0: ldr [[R0:r[0-9]+]], [[L0:.*]]
17 ; NO-OPTION-O0: [[L0]]:
18 ; NO-OPTION-O0: .long 2296237089
24 ; USE-MOVT-O0-LABEL: {{_?}}foo0
25 ; USE-MOVT-O0: movw [[R0:r[0-9]+]], #52257
26 ; USE-MOVT-O0: movt [[R0]], #35037
[all …]
Dcxx-tlscc.ll6 …: llc < %s -mtriple=armv7k-apple-watchos2.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix…
7 ; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=…
67 ; CHECK-O0-LABEL: _ZTW2sg
68 ; WATCH-O0: push {r1, r2, r3, r6, r7, lr}
69 ; IOS-O0: push {r1, r2, r3, r7, lr}
70 ; CHECK-O0: push {r9, r12}
71 ; CHECK-O0: vpush {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
72 ; CHECK-O0: vpush {d0, d1, d2, d3, d4, d5, d6, d7}
73 ; CHECK-O0: blx
74 ; CHECK-O0: bne [[BB_end:.?LBB0_[0-9]+]]
[all …]
Ddivmod-eabi.ll1 ; We run the tests with both the default optimization level and O0, to make sure
5 ; the same divmod, but luckily this doesn't occur in practice even at O0).
9 ; RUN: llc -mtriple armv7-none-eabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EA…
11 ; RUN: llc -mtriple armv7-none-eabihf %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=…
14 ; RUN: llc -mtriple armv7-linux-androideabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-p…
16 ; RUN: llc -mtriple armv7-linux-gnueabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefi…
18 ; RUN: llc -mtriple armv7-linux-musleabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-pref…
20 …RUN: llc -mtriple armv7-apple-darwin %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=…
22 …: llc -mtriple thumbv7-windows %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefixes=WIND…
27 ; DARWIN-O0-LABEL: f16:
[all …]
Dswifterror.ll2 …-sink-local-values -verify-machineinstrs -O0 < %s -mtriple=armv7-apple-ios | FileCheck --check-pre…
20 ; CHECK-O0-LABEL: foo:
21 ; CHECK-O0: mov r{{.*}}, #16
22 ; CHECK-O0: malloc
23 ; CHECK-O0: mov [[ID2:r[0-9]+]], r0
24 ; CHECK-O0: mov [[ID:r[0-9]+]], #1
25 ; CHECK-O0: strb [[ID]], [r0, #8]
26 ; CHECK-O0: mov r8, [[ID2]]
49 ; CHECK-O0-LABEL: caller:
51 ; CHECK-O0-DAG: mov r8, #0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dswifterror.ll2 ; RUN: llc < %s -O0 -mtriple=s390x-linux-gnu | FileCheck --check-prefix=CHECK-O0 %s
16 ; CHECK-O0-LABEL: foo:
17 ; CHECK-O0: lghi %r2, 16
18 ; CHECK-O0: brasl %r14, malloc
19 ; CHECK-O0: lgr %r9, %r2
20 ; CHECK-O0: mvi 8(%r2), 1
43 ; CHECK-O0-LABEL: caller:
44 ; CHECK-O0: lghi %r9, 0
45 ; CHECK-O0: brasl %r14, foo
46 ; CHECK-O0: cghi %r9, 0
[all …]
Dswift-return.ll2 ; RUN: llc < %s -mtriple=s390x-linux-gnu -O0 -verify-machineinstrs | FileCheck --check-prefix=CHECK…
14 ; CHECK-O0-LABEL: test
15 ; CHECK-O0: st %r2
16 ; CHECK-O0: brasl %r14, gen
17 ; CHECK-O0-DAG: lhr %[[REG1:r[0-9]+]], %r2
18 ; CHECK-O0-DAG: lbr %[[REG2:r[0-9]+]], %r3
19 ; CHECK-O0: ar %[[REG1]], %[[REG2]]
20 ; CHECK-O0: lr %r2, %[[REG1]]
50 ; CHECK-O0-LABEL: test2:
51 ; CHECK-O0: st %r2, [[SPILL1:[0-9]+]](%r15)
[all …]
/external/llvm/test/CodeGen/ARM/
Dswifterror.ll2 ; RUN: llc -verify-machineinstrs -O0 < %s -mtriple=armv7-apple-ios | FileCheck --check-prefix=CHECK…
19 ; CHECK-O0-LABEL: foo:
20 ; CHECK-O0: mov r{{.*}}, #16
21 ; CHECK-O0: malloc
22 ; CHECK-O0: mov [[ID2:r[0-9]+]], r0
23 ; CHECK-O0: mov [[ID:r[0-9]+]], #1
24 ; CHECK-O0: strb [[ID]], [r0, #8]
25 ; CHECK-O0: mov r6, [[ID2]]
48 ; CHECK-O0-LABEL: caller:
50 ; CHECK-O0-DAG: str r0,
[all …]
Dcxx-tlscc.ll6 …: llc < %s -mtriple=armv7k-apple-watchos2.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix…
7 ; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=…
67 ; CHECK-O0-LABEL: _ZTW2sg
68 ; WATCH-O0: push {r1, r2, r3, r6, r7, lr}
69 ; IOS-O0: push {r1, r2, r3, r7, lr}
70 ; CHECK-O0: push {r9, r12}
71 ; CHECK-O0: vpush {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
72 ; CHECK-O0: vpush {d0, d1, d2, d3, d4, d5, d6, d7}
73 ; CHECK-O0: blx
74 ; CHECK-O0: bne [[BB_end:.?LBB0_[0-9]+]]
[all …]
Dswift-return.ll2 …-apple-ios8.0 -mcpu=cortex-a7 -verify-machineinstrs < %s -O0 | FileCheck --check-prefix=CHECK-O0 %s
5 … llc -mtriple=armv7-apple-ios -verify-machineinstrs < %s -O0 | FileCheck --check-prefix=CHECK-O0 %s
13 ; CHECK-O0-LABEL: test:
14 ; CHECK-O0: bl {{.*}}gen
15 ; CHECK-O0: sxth r0, r0
16 ; CHECK-O0: sxtb r1, r1
17 ; CHECK-O0: add r0, r0, r1
48 ; CHECK-O0-LABEL: test2:
49 ; CHECK-O0: str r0
50 ; CHECK-O0: mov r0, sp
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dswifterror.ll2 ; RUN: llc < %s -O0 -mtriple=s390x-linux-gnu | FileCheck --check-prefix=CHECK-O0 %s
16 ; CHECK-O0-LABEL: foo:
17 ; CHECK-O0: lghi %r2, 16
18 ; CHECK-O0: brasl %r14, malloc
19 ; CHECK-O0: lgr %r[[REG1:[0-9]+]], %r2
20 ; CHECK-O0: mvi 8(%r2), 1
21 ; CHECK-O0: lgr %r9, %r[[REG1]]
44 ; CHECK-O0-LABEL: caller:
45 ; CHECK-O0: lghi %r9, 0
46 ; CHECK-O0: brasl %r14, foo
[all …]
Dswift-return.ll2 ; RUN: llc < %s -mtriple=s390x-linux-gnu -O0 -verify-machineinstrs | FileCheck --check-prefix=CHECK…
14 ; CHECK-O0-LABEL: test
15 ; CHECK-O0: st %r2
16 ; CHECK-O0: brasl %r14, gen
17 ; CHECK-O0-DAG: lhr %[[REG1:r[0-9]+]], %r2
18 ; CHECK-O0-DAG: lbr %[[REG2:r[0-9]+]], %r3
19 ; CHECK-O0: ar %[[REG1]], %[[REG2]]
20 ; CHECK-O0: lr %r2, %[[REG1]]
51 ; CHECK-O0-LABEL: test2:
52 ; CHECK-O0: la %[[REG1:r[0-9]+]], 168(%r15)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
DLeonCASAInstructionUT.ll1 ; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+hasleoncasa -o - | FileCheck %s
2 ; RUN: llc %s -O0 -march=sparc -mcpu=gr712rc -o - | FileCheck %s
3 ; RUN: llc %s -O0 -march=sparc -mcpu=leon4 -o - | FileCheck %s
4 ; RUN: llc %s -O0 -march=sparc -mcpu=gr740 -o - | FileCheck %s
5 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2 -o - | FileCheck %s
6 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.1 -o - | FileCheck %s
7 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.2 -o - | FileCheck %s
8 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.3 -o - | FileCheck %s
9 ; RUN: llc %s -O0 -march=sparc -mcpu=ma2100 -o - | FileCheck %s
10 ; RUN: llc %s -O0 -march=sparc -mcpu=ma2150 -o - | FileCheck %s
[all …]
/external/webp/src/dsp/
Dmips_macro.h26 #define ADD_SUB_HALVES(O0, O1, \ argument
28 "addq.ph %[" #O0 "], %[" #I0 "], %[" #I1 "] \n\t" \
34 #define LOAD_IN_X2(O0, O1, \ argument
36 "lh %[" #O0 "], " #I0 "(%[in]) \n\t" \
41 #define LOAD_WITH_OFFSET_X4(O0, O1, O2, O3, \ argument
43 "ulw %[" #O0 "], " #I1 "+" XSTR(I9) "*" #I5 "(%[" #I0 "]) \n\t" \
51 #define MUL_SHIFT_SUM(O0, O1, O2, O3, O4, O5, O6, O7, \ argument
54 "mul %[" #O0 "], %[" #I0 "], %[kC2] \n\t" \
62 "sra %[" #O0 "], %[" #O0 "], 16 \n\t" \
77 #define INSERT_HALF_X2(O0, O1, \ argument
[all …]

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