Home
last modified time | relevance | path

Searched refs:O7 (Results 1 – 25 of 204) sorted by relevance

123456789

/external/webp/src/dsp/
Dmips_macro.h51 #define MUL_SHIFT_SUM(O0, O1, O2, O3, O4, O5, O6, O7, \ argument
61 "mul %[" #O7 "], %[" #I3 "], %[kC1] \n\t" \
69 "sra %[" #O7 "], %[" #O7 "], 16 \n\t" \
97 #define SHIFT_R_SUM_X2(O0, O1, O2, O3, O4, O5, O6, O7, \ argument
106 "subq.ph %[" #O7 "], %[" #I3 "], %[" #I7 "] \n\t" \
114 "shra.ph %[" #O7 "], %[" #O7 "], 3 \n\t"
141 #define CONVERT_2_BYTES_TO_HALF(O0, O1, O2, O3, O4, O5, O6, O7, \ argument
150 "preceu.ph.qbl %[" #O7 "], %[" #I3 "] \n\t"
/external/ltp/testcases/kernel/syscalls/ptrace/
Dsimple_tracer.c94 #define O7 u_regs[14] in decode_regs()
109 decode(O7); in decode_regs()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/InstPrinter/
DSparcInstPrinter.cpp73 case SP::O7: O << "\tretl"; return true; in printSparcAliasInstr()
78 case SP::O7: // call $addr in printSparcAliasInstr()
/external/llvm/lib/Target/Sparc/InstPrinter/
DSparcInstPrinter.cpp73 case SP::O7: O << "\tretl"; return true; in printSparcAliasInstr()
78 case SP::O7: // call $addr in printSparcAliasInstr()
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DSparcRegisterInfo.td67 def O7 : Ri<15, "O7">, DwarfRegNum<[15]>;
145 O0, O1, O2, O3, O4, O5, O7,
DSparcAsmPrinter.cpp148 assert(MO.getReg() != SP::O7 && in printGetPCX()
DSparcInstrInfo.td212 let Defs = [O7] in {
299 let rd = O7.Num, rs1 = G0.Num in
546 Defs = [O0, O1, O2, O3, O4, O5, O7, G1, G2, G3, G4, G5, G6, G7,
/external/llvm/lib/Target/Sparc/
DSparcAsmPrinter.cpp180 assert(MO.getReg() != SP::O7 && in LowerGETPCXAndEmitMCInsts()
216 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
230 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
DSparcRegisterInfo.td143 def O7 : Ri<15, "O7">, DwarfRegNum<[15]>;
292 def O6_O7 : Rdi<14, "O6", [O6, O7]>;
DSparcRegisterInfo.cpp37 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {} in SparcRegisterInfo()
DSparcFrameLowering.cpp172 unsigned regOutRA = RegInfo.getDwarfRegNum(SP::O7, true); in emitPrologue()
DDelaySlotFiller.cpp297 RegDefs.insert(SP::O7); in insertCallDefsUses()
DSparcInstrAliases.td351 def : InstAlias<"call $addr", (JMPLrr O7, MEMrr:$addr), 0>;
352 def : InstAlias<"call $addr", (JMPLri O7, MEMri:$addr), 0>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/
DSparcAsmPrinter.cpp178 assert(MO.getReg() != SP::O7 && in LowerGETPCXAndEmitMCInsts()
214 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
228 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
DSparcRegisterInfo.td143 def O7 : Ri<15, "O7">, DwarfRegNum<[15]>;
292 def O6_O7 : Rdi<14, "O6", [O6, O7]>;
DSparcRegisterInfo.cpp37 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {} in SparcRegisterInfo()
DSparcFrameLowering.cpp172 unsigned regOutRA = RegInfo.getDwarfRegNum(SP::O7, true); in emitPrologue()
DDelaySlotFiller.cpp295 RegDefs.insert(SP::O7); in insertCallDefsUses()
DSparcInstrAliases.td351 def : InstAlias<"call $addr", (JMPLrr O7, MEMrr:$addr), 0>;
352 def : InstAlias<"call $addr", (JMPLri O7, MEMri:$addr), 0>;
/external/cldr/tools/cldr-unittest/src/org/unicode/cldr/unittest/data/transformtest/
Dund-t-s0-publish.txt45 O⅞ O7/8
Dund-t-d0-publish.txt51 O7/8 O⅞
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCTargetDesc.cpp61 InitSparcMCRegisterInfo(X, SP::O7); in createSparcMCRegisterInfo()
/external/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCTargetDesc.cpp61 InitSparcMCRegisterInfo(X, SP::O7); in createSparcMCRegisterInfo()
/external/ImageMagick/PerlMagick/t/reference/filter/
DColorize.miff15 …(���"�*'�" �����#!������.,�DF�>B�6>�$1�+�1�@'�F2�O7�V8�V8�Y8�]8�U9�[M�`_…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp130 Sparc::O4, Sparc::O5, Sparc::O6, Sparc::O7,
403 else if (Reg >= Sparc::O0 && Reg <= Sparc::O7) in MorphToIntPairReg()

123456789