Searched refs:ODPG_WR_RD_MODE_ENA_REG (Results 1 – 5 of 5) sorted by relevance
34 #define ODPG_WR_RD_MODE_ENA_REG 0x10fc macro
133 ODPG_WR_RD_MODE_ENA_REG, 0, in ddr3_tip_dynamic_read_leveling()508 ODPG_WR_RD_MODE_ENA_REG, 0, in ddr3_tip_dynamic_per_bit_read_leveling()
875 ODPG_WR_RD_MODE_ENA_REG, 0xffff, MASK_ALL_BITS)); in ddr3_tip_pbs()
413 ODPG_WR_RD_MODE_ENA_REG, reg_data, in ddr3_tip_ip_training()
2091 ODPG_WR_RD_MODE_ENA_REG, in ddr3_tip_restore_dunit_regs()