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Searched refs:OP_LG2 (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_target_gm107.cpp122 case OP_LG2: in isBarrierRequired()
249 case OP_LG2: in getLatency()
277 case OP_LG2: in getReadLatency()
Dnv50_ir_target_nv50.cpp103 { OP_LG2, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
541 case OP_LG2: in getThroughput()
Dnv50_ir_target_nvc0.cpp129 { OP_LG2, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
584 case OP_LG2: in getThroughput()
Dnv50_ir.h84 OP_LG2, enumerator
Dnv50_ir_emit_gm107.cpp1402 case OP_LG2: mufu = 3; break; in emitMUFU()
3332 case OP_LG2: in emitInstruction()
Dnv50_ir_emit_nv50.cpp1960 case OP_LG2: in emitInstruction()
Dnv50_ir_lowering_nv50.cpp1252 bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0)); in handlePOW()
Dnv50_ir_peephole.cpp821 case OP_LG2: res.data.f32 = log2f(imm.reg.data.f32); break; in unary()
1404 case OP_LG2: in opnd()
Dnv50_ir_emit_gk110.cpp2629 case OP_LG2: in emitInstruction()
Dnv50_ir_emit_nvc0.cpp2797 case OP_LG2: in emitInstruction()
Dnv50_ir_lowering_nvc0.cpp2764 bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0)); in handlePOW()
Dnv50_ir_from_tgsi.cpp3342 val0 = mkOp1v(OP_LG2, TYPE_F32, dst0[2] ? dst0[2] : getSSA(), src0); in handleInstruction()