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Searched refs:OP_MAD (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_target_gm107.cpp165 if ((insn->op == OP_MUL || insn->op == OP_MAD) && in isBarrierRequired()
210 case OP_MAD: in getLatency()
Dnv50_ir_target_nvc0.cpp107 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // special c[] constraint
494 return (insn->op == OP_ADD) || (insn->op == OP_MAD); in isSatSupported()
570 case OP_MAD: in getThroughput()
602 case OP_MAD: in getThroughput()
Dnv50_ir_peephole.cpp529 case OP_MAD: in expr()
706 case OP_MAD: in expr()
757 case OP_MAD: in expr()
908 case OP_MAD: in opnd3()
1033 case OP_MAD: in opnd()
1149 bld.mkOp3(OP_MAD, TYPE_S32, tA, i->getSrc(0), bld.loadImm(NULL, m), in opnd()
1734 if (!add->precise && prog->getTarget()->isOpSupported(OP_MAD, add->dType)) in handleADD()
1735 changed = tryADDToMADOrSAD(add, OP_MAD); in handleADD()
1751 const Modifier modBad = Modifier(~((toOp == OP_MAD) ? NV50_IR_MOD_NEG : 0)); in tryADDToMADOrSAD()
2338 if (i->op == OP_MAD || i->op == OP_MUL) in visit()
[all …]
Dnv50_ir_target_nv50.cpp90 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
341 if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) { in insnCanLoad()
Dnv50_ir_lowering_nv50.cpp102 i[3] = bld->mkOp3(OP_MAD, fTy, t[1], a[1], b[0], t[0]); in expandIntegerMUL()
110 i[4] = bld->mkOp3(OP_MAD, fTy, t[3], a[0], b[0], t[2]); in expandIntegerMUL()
126 i[5] = bld->mkOp3(OP_MAD, fTy, r[4], a[1], b[1], r[2]); in expandIntegerMUL()
463 if (mul->op == OP_MAD) { in handleMUL()
600 case OP_MAD: in visit()
1316 Value *sum = bld.mkOp3v(OP_MAD, TYPE_U16, bld.getSSA(), a[0], b[0], in handleLOAD()
Dnv50_ir_lowering_gm107.cpp249 bld.mkOp3(OP_MAD , TYPE_U32, tmp0, tmp0, tmp1, tmp2); in handlePFETCH()
Dnv50_ir.h57 OP_MAD, enumerator
Dnv50_ir_from_tgsi.cpp2255 mkOp3(OP_MAD, TYPE_F32, dotp, src0, src1, dotp) in buildDot()
3388 mkOp3(OP_MAD, TYPE_F32, dst0[c], in handleInstruction()
4236 mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]); in handleUserClipPlanes()
Dnv50_ir_emit_nvc0.cpp2729 case OP_MAD: in emitInstruction()
2958 if (i->predSrc >= 0 && i->op == OP_MAD) in getMinEncodingSize()
Dnv50_ir_emit_nv50.cpp1904 case OP_MAD: in emitInstruction()
Dnv50_ir_emit_gk110.cpp2555 case OP_MAD: in emitInstruction()
Dnv50_ir_ra.cpp1472 if (insn->op == OP_MAD || insn->op == OP_FMA || insn->op == OP_SAD) in allocateRegisters()
Dnv50_ir_emit_gm107.cpp3245 case OP_MAD: in emitInstruction()