Searched refs:OP_RSQ (Results 1 – 13 of 13) sorted by relevance
/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_target_gm107.cpp | 126 case OP_RSQ: in isBarrierRequired() 254 case OP_RSQ: in getLatency() 281 case OP_RSQ: in getReadLatency()
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D | nv50_ir_target_nv50.cpp | 105 { OP_RSQ, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, 540 case OP_RSQ: in getThroughput()
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D | nv50_ir_target_nvc0.cpp | 131 { OP_RSQ, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 }, 583 case OP_RSQ: in getThroughput()
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D | nv50_ir_print.cpp | 611 case OP_RSQ: in print()
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D | nv50_ir.h | 83 OP_RSQ, enumerator
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D | nv50_ir_lowering_nvc0.cpp | 299 case OP_RSQ: in visit() 2744 bld.mkOp1(OP_RSQ, i->dType, dst, i->getSrc(0)); in handleSQRT() 2752 i->op = OP_RSQ; in handleSQRT()
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D | nv50_ir_emit_nvc0.cpp | 2791 case OP_RSQ: in emitInstruction() 2994 if (i->op != OP_RSQ) in getMinEncodingSize()
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D | nv50_ir_emit_gm107.cpp | 1404 case OP_RSQ: mufu = 5 + 2 * insn->subOp; break; in emitMUFU() 3334 case OP_RSQ: in emitInstruction()
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D | nv50_ir_emit_nv50.cpp | 1957 case OP_RSQ: in emitInstruction()
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D | nv50_ir_lowering_nv50.cpp | 1241 i->op = OP_RSQ; in handleSQRT()
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D | nv50_ir_peephole.cpp | 820 case OP_RSQ: res.data.f32 = 1.0f / sqrtf(imm.reg.data.f32); break; in unary() 1407 case OP_RSQ: in opnd()
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D | nv50_ir_emit_gk110.cpp | 2623 case OP_RSQ: in emitInstruction()
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D | nv50_ir_from_tgsi.cpp | 3285 mkOp1(OP_RSQ, TYPE_F32, val0, val0); in handleInstruction()
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