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Searched refs:OP_RSQ (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_target_gm107.cpp126 case OP_RSQ: in isBarrierRequired()
254 case OP_RSQ: in getLatency()
281 case OP_RSQ: in getReadLatency()
Dnv50_ir_target_nv50.cpp105 { OP_RSQ, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
540 case OP_RSQ: in getThroughput()
Dnv50_ir_target_nvc0.cpp131 { OP_RSQ, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
583 case OP_RSQ: in getThroughput()
Dnv50_ir_print.cpp611 case OP_RSQ: in print()
Dnv50_ir.h83 OP_RSQ, enumerator
Dnv50_ir_lowering_nvc0.cpp299 case OP_RSQ: in visit()
2744 bld.mkOp1(OP_RSQ, i->dType, dst, i->getSrc(0)); in handleSQRT()
2752 i->op = OP_RSQ; in handleSQRT()
Dnv50_ir_emit_nvc0.cpp2791 case OP_RSQ: in emitInstruction()
2994 if (i->op != OP_RSQ) in getMinEncodingSize()
Dnv50_ir_emit_gm107.cpp1404 case OP_RSQ: mufu = 5 + 2 * insn->subOp; break; in emitMUFU()
3334 case OP_RSQ: in emitInstruction()
Dnv50_ir_emit_nv50.cpp1957 case OP_RSQ: in emitInstruction()
Dnv50_ir_lowering_nv50.cpp1241 i->op = OP_RSQ; in handleSQRT()
Dnv50_ir_peephole.cpp820 case OP_RSQ: res.data.f32 = 1.0f / sqrtf(imm.reg.data.f32); break; in unary()
1407 case OP_RSQ: in opnd()
Dnv50_ir_emit_gk110.cpp2623 case OP_RSQ: in emitInstruction()
Dnv50_ir_from_tgsi.cpp3285 mkOp1(OP_RSQ, TYPE_F32, val0, val0); in handleInstruction()