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Searched refs:OP_SAD (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_target_gm107.cpp58 case OP_SAD: in isOpSupported()
Dnv50_ir_target_nv50.cpp443 case OP_SAD: in isOpSupported()
Dnv50_ir_target_nvc0.cpp424 if (op == OP_SAD && ty != TYPE_S32 && ty != TYPE_U32) in isOpSupported()
Dnv50_ir_peephole.cpp1683 !prog->getTarget()->isOpSupported(OP_SAD, abs->dType)) in handleABS()
1715 abs->op = OP_SAD; in handleABS()
1736 if (!changed && prog->getTarget()->isOpSupported(OP_SAD, add->dType)) in handleADD()
1737 changed = tryADDToMADOrSAD(add, OP_SAD); in handleADD()
1750 const operation srcOp = toOp == OP_SAD ? OP_SAD : OP_MUL; in tryADDToMADOrSAD()
1773 if (toOp == OP_SAD) { in tryADDToMADOrSAD()
Dnv50_ir.h59 OP_SAD, // abs(src0 - src1) + src2 enumerator
Dnv50_ir_emit_nv50.cpp1913 case OP_SAD: in emitInstruction()
Dnv50_ir_emit_gk110.cpp2567 case OP_SAD: in emitInstruction()
Dnv50_ir_ra.cpp1472 if (insn->op == OP_MAD || insn->op == OP_FMA || insn->op == OP_SAD) in allocateRegisters()
Dnv50_ir_emit_nvc0.cpp2738 case OP_SAD: in emitInstruction()