/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_target_nvc0.cpp | 122 { OP_SET, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 }, 448 case OP_SET: in isModSupported() 577 case OP_SET: in getThroughput() 604 case OP_SET: in getThroughput()
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D | nv50_ir_target_nv50.cpp | 99 { OP_SET, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 }, 445 case OP_SET: in isOpSupported() 475 case OP_SET: in isModSupported()
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D | nv50_ir_target_gm107.cpp | 221 case OP_SET: in getLatency()
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D | nv50_ir_lowering_nvc0.cpp | 209 bld.mkCmp(OP_SET, CC_LE, TYPE_U8, (pred = bld.getSSA(1, FILE_PREDICATE)), in handleShift() 312 case OP_SET: in visit() 1366 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), in handleSharedATOMNVE4() 1395 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(), in handleSharedATOMNVE4() 1481 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), in handleSharedATOM() 1579 bld.mkCmp(OP_SET, CC_GT, TYPE_U32, pred, TYPE_U32, offset, length); in handleATOM() 2047 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), in processSurfaceCoordsNVE4() 2268 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), in processSurfaceCoordsNVC0() 2367 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), in processSurfaceCoordsGM107() 2487 bld.mkCmp(OP_SET, CC_GT, TYPE_U32, pred, TYPE_U32, offset, length); in handleLDST() [all …]
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D | nv50_ir_peephole.cpp | 195 if (insn->op != OP_SET && insn->op != OP_SLCT && insn->op != OP_SUB) in checkSwapSrc01() 201 if (insn->op == OP_SET && insn->subOp) in checkSwapSrc01() 229 if (insn->op == OP_SET || insn->op == OP_SET_AND || in checkSwapSrc01() 967 newi = bld.mkCmp(OP_SET, CC_LT, TYPE_S32, i->getDef(0), in opnd() 1156 bld.mkCmp(OP_SET, CC_LT, TYPE_S32, tA, TYPE_S32, i->getSrc(0), bld.mkImm(0)); in opnd() 1182 bld.mkCmp(OP_SET, CC_LT, TYPE_S32, in opnd() 1213 case OP_SET: // TODO: SET_AND,OR,XOR in opnd() 1885 if (set1->op != OP_SET) { in handleLOGOP() 1889 if (set1->op != OP_SET) in handleLOGOP() 1896 if (set0->op != OP_SET && in handleLOGOP() [all …]
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D | nv50_ir_from_tgsi.cpp | 3402 mkCmp(OP_SET, CC_GT, srcTy, val0, srcTy, src0, zero); in handleInstruction() 3403 mkCmp(OP_SET, CC_LT, srcTy, val1, srcTy, src0, zero); in handleInstruction() 3465 mkCmp(OP_SET, CC_NE, TYPE_U32, val0, TYPE_U32, fetchSrc(0, c), zero); in handleInstruction() 3474 mkCmp(OP_SET, CC_NE, TYPE_U32, val0, TYPE_U32, fetchSrc(0, 0), zero); in handleInstruction() 3513 mkCmp(OP_SET, CC_LT, TYPE_F32, val0, TYPE_F32, fetchSrc(0, c), zero); in handleInstruction() 4177 mkCmp(OP_SET, CC_GT, TYPE_F32, val0, TYPE_F64, src0, zero); in handleInstruction() 4178 mkCmp(OP_SET, CC_LT, TYPE_F32, val1, TYPE_F64, src0, zero); in handleInstruction() 4195 mkCmp(OP_SET, CC_GT, TYPE_U32, val0, TYPE_S64, src0, zero); in handleInstruction() 4196 mkCmp(OP_SET, CC_LT, TYPE_U32, val1, TYPE_S64, src0, zero); in handleInstruction() 4269 mkCmp(OP_SET, CC_TR, TYPE_U32, pred, TYPE_F32, val, in exportOutputs()
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D | nv50_ir_lowering_nv50.cpp | 536 bld.mkCmp(OP_SET, CC_GE, TYPE_U32, (s = bld.getSSA()), TYPE_U32, m, b); in handleDIV() 1081 i->op = OP_SET; in handleSLCT() 1375 bld.mkCmp(OP_SET, CC_NEU, insn->dType, cdst, insn->dType, bld.loadImm(NULL, 0), pred); in checkPredicate() 1412 case OP_SET: in visit()
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D | nv50_ir_emit_gm107.cpp | 1163 if (insn->op != OP_SET) { in emitDSET() 1211 if (insn->op != OP_SET) { in emitDSETP() 1549 if (insn->op != OP_SET) { in emitFSET() 1598 if (insn->op != OP_SET) { in emitFSETP() 1987 if (insn->op != OP_SET) { in emitISET() 2033 if (insn->op != OP_SET) { in emitISETP() 3300 case OP_SET: in emitInstruction()
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D | nv50_ir.h | 79 OP_SET, enumerator
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D | nv50_ir_emit_gk110.cpp | 1169 if (i->op != OP_SET) { in emitSET() 2592 case OP_SET: in emitInstruction()
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D | nv50_ir_emit_nvc0.cpp | 1193 if (i->op != OP_SET) in emitSET() 2760 case OP_SET: in emitInstruction()
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D | nv50_ir_emit_nv50.cpp | 1928 case OP_SET: in emitInstruction()
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