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Searched refs:OP_TXD (Results 1 – 10 of 10) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_emit_gk110.cpp1271 case OP_TXD: in emitTEX()
1289 case OP_TXD: in emitTEX()
1328 case OP_TXD: break; in emitTEX()
1343 if (i->op != OP_TXD && i->tex.derivAll) in emitTEX()
1375 case OP_TXD: code[1] |= 0x00400000; break; in emitTEX()
2648 case OP_TXD: in emitInstruction()
Dnv50_ir_lowering_nvc0.cpp915 if (i->op != OP_TXD || chipset < NVISA_GM107_CHIPSET) { in handleTEX()
925 i->op == OP_TXD || chipset < NVISA_GM107_CHIPSET)) { in handleTEX()
1006 if (i->op != OP_TXD || chipset < NVISA_GK104_CHIPSET) { in handleTEX()
1043 if (i->op == OP_TXD && chipset >= NVISA_GK104_CHIPSET) { in handleTEX()
2862 case OP_TXD: in visit()
Dnv50_ir_ra.cpp1112 case OP_TXD: in doCoalesce()
2125 if (tex->op == OP_TXD) { in texConstraintGM107()
2190 if (tex->op == OP_TXD && tex->tex.useOffsets) in texConstraintNVC0()
Dnv50_ir_lowering_nv50.cpp730 if (i->tex.target.isCube() && i->op != OP_TXD) { in handleTEX()
1402 case OP_TXD: in visit()
Dnv50_ir.h121 OP_TXD, // texture derivatives enumerator
Dnv50_ir_emit_nvc0.cpp1327 case OP_TXD: code[1] = 0xe0000000; break; in emitTEX()
1340 if (i->op != OP_TXD && i->tex.derivAll) in emitTEX()
2816 case OP_TXD: in emitInstruction()
Dnv50_ir.cpp929 if (op == OP_TXD) { in clone()
Dnv50_ir_emit_nv50.cpp2050 case OP_TXD: in emitInstruction()
Dnv50_ir_emit_gm107.cpp3410 case OP_TXD: in emitInstruction()
Dnv50_ir_from_tgsi.cpp2396 if (texi->op == OP_TXD) { in handleTEX()