| /external/pcre/dist2/src/sljit/ |
| D | sljitNativePPC_64.c | 55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
59 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
77 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp >> 32))); in load_immediate()
89 return push_inst(compiler, ORI | S(reg) | A(reg) | tmp2); in load_immediate()
96 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp2)) : SLJIT_SUCCESS; in load_immediate()
107 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | (tmp2 >> 48))); in load_immediate()
113 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm >> 32))); in load_immediate()
116 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)); in load_immediate()
346 return push_inst(compiler, ORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
354 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
[all …]
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| D | sljitNativeMIPS_64.c | 38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
45 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
81 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 32), dst_ar)); in load_immediate()
89 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
114 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
118 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
237 …FAIL_IF(push_inst(compiler, ORI | SA(0) | T(dst) | IMM((op & SLJIT_I32_OP) ? 32 : 64), UNMOVABLE_I… in emit_single_op()
262 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(OTHER_FLAG) | IMM(src2), OTHER_FLAG)); in emit_single_op()
303 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); in emit_single_op()
483 EMIT_LOGICAL(ORI, OR); in emit_single_op()
[all …]
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| D | sljitNativePPC_32.c | 35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
194 return push_inst(compiler, ORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
202 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
255 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(init_value)); in emit_const()
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| D | sljitNativeMIPS_32.c | 32 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
38 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
146 FAIL_IF(push_inst(compiler, ORI | SA(0) | T(dst) | IMM(32), UNMOVABLE_INS)); in emit_single_op()
171 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(OTHER_FLAG) | IMM(src2), OTHER_FLAG)); in emit_single_op()
212 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); in emit_single_op()
389 EMIT_LOGICAL(ORI, OR); in emit_single_op()
416 return push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value), DR(dst)); in emit_const()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | expand-isel-8.mir | 53 ; CHECK: $r5 = ORI $r4, 0
54 ; CHECK: $r3 = ORI $r5, 0
55 ; CHECK: $r4 = ORI $r5, 0
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| D | expand-isel-7.mir | 51 ; CHECK: $r5 = ORI $r4, 0
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| D | expand-isel-3.mir | 51 ; CHECK: $r3 = ORI $r0, 0
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| D | expand-isel-6.mir | 51 ; CHECK: $r3 = ORI $r0, 0
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| D | expand-isel-2.mir | 51 ; CHECK: $r3 = ORI $r4, 0
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| D | expand-isel-4.mir | 52 ; CHECK: $r0 = ORI killed $r5, 0
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/IPO/ |
| D | PartialInlining.cpp | 181 : ORI() {} in FunctionOutliningMultiRegionInfo()
196 SmallVector<OutlineRegionInfo, 4> ORI; member
529 OutliningInfo->ORI.push_back(RegInfo); in computeOutliningColdRegionsInfo()
992 OI->ORI) { in FunctionCloner()
1004 ClonedOMRI->ORI.push_back(MappedRegionInfo); in FunctionCloner()
1102 if (ClonedOMRI->ORI.empty()) in doMultiRegionFunctionOutlining()
1116 ClonedOMRI->ORI) { in doMultiRegionFunctionOutlining()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 136 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
140 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
162 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
379 BuildMI(MBB, MBBI, dl, TII.get(PPC::ORI), PPC::R0) in emitPrologue()
590 BuildMI(MBB, MBBI, dl, TII.get(PPC::ORI), PPC::R0) in emitEpilogue()
668 unsigned ORIInstr = isPPC64 ? PPC::ORI8 : PPC::ORI; in emitEpilogue()
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| D | PPCRegisterInfo.cpp | 293 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI; in eliminateCallFramePseudoInstr()
605 BuildMI(MBB, II, dl, TII.get(PPC::ORI), SReg) in eliminateFrameIndex()
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/ |
| D | MBlazeAsmBackend.cpp | 74 case MBlaze::ORI: return MBlaze::ORI32; in getRelaxedOpcode()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 351 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
355 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
377 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
765 : PPC::ORI ); in emitPrologue()
1141 : PPC::ORI ); in emitEpilogue()
1829 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI; in eliminateCallFramePseudoInstr()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 369 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
373 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
395 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
775 : PPC::ORI ); in emitPrologue()
1271 : PPC::ORI ); in emitEpilogue()
2077 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI; in eliminateCallFramePseudoInstr()
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| D | PPCExpandISEL.cpp | 485 TII->get(isISEL8(*MI) ? PPC::ORI8 : PPC::ORI)) in populateBlocks()
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrInfo.td | 417 def ORI : LogicI<0x28, "ori ", or>;
729 def : Pat<(i32 immZExt16:$imm), (ORI (i32 R0), imm:$imm)>;
854 def : Pat<(MBWrapper tglobaladdr:$in), (ORI (i32 R0), tglobaladdr:$in)>;
855 def : Pat<(MBWrapper tjumptable:$in), (ORI (i32 R0), tjumptable:$in)>;
856 def : Pat<(MBWrapper tconstpool:$in), (ORI (i32 R0), tconstpool:$in)>;
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| D | MBlazeInstrFormats.td | 19 def FRRI : Format<2>; // ADDI, ORI, etc.
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| /external/v8/src/ppc/ |
| D | assembler-ppc.cc | 320 bool Assembler::IsOri(Instr instr) { return (instr & kOpcodeMask) == ORI; } in IsOri()
476 instr = ORI; // nop: ori, 0,0,0 in target_at_put()
489 instr = ORI; // nop: ori, 0,0,0 in target_at_put()
944 d_form(ORI, rs, ra, imm.immediate(), false); in ori()
1988 return instr == (ORI | reg * B21 | reg * B16); in IsNop()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 442 ORI = ((1U << 3) + 5) << kOpcodeShift, enumerator
1264 OpcodeToBitNumber(ANDI) | OpcodeToBitNumber(ORI) |
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 412 ORI = ((1U << 3) + 5) << kOpcodeShift, enumerator
1298 OpcodeToBitNumber(ORI) | OpcodeToBitNumber(XORI) |
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| D | assembler-mips64.cc | 652 return opcode == ORI; in IsOri()
2087 GenInstrImmediate(ORI, rs, rt, j); in ori()
4319 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) && in target_address_at()
4320 (GetOpcodeField(instr3) == ORI)) { in target_address_at()
4372 DCHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI && in set_target_value_at()
4373 GetOpcodeField(instr3) == ORI)); in set_target_value_at()
4382 *(p + 1) = ORI | (rt_code << kRtShift) | (rt_code << kRsShift) | in set_target_value_at()
4384 *(p + 3) = ORI | (rt_code << kRsShift) | (rt_code << kRtShift) | in set_target_value_at()
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| /external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/ |
| D | or_ops.ll | 184 ; ORI instruction generation (i32 data type):
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| /external/icu/icu4c/source/common/ |
| D | ucnvisci.cpp | 94 ORI = 0x47, enumerator
147 { ORIYA, ORI_MASK, ORI },
|