Searched refs:Offset64 (Results 1 – 4 of 4) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/tools/dsymutil/ |
D | DwarfLinker.cpp | 384 uint64_t Offset64 = Reloc.getOffset(); in findValidRelocsMachO() local 390 uint32_t Offset = Offset64; in findValidRelocsMachO() 416 ValidRelocs.emplace_back(Offset64, RelocSize, Addend, Mapping); in findValidRelocsMachO() 421 ValidRelocs.emplace_back(Offset64, RelocSize, SymOffset, Mapping); in findValidRelocsMachO()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 8297 int Offset64, bits<4> opcode> { 8346 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8351 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8356 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8363 defm : SIMDLdStAliases<asm, "8b", Count, Offset64, 64>; 8364 defm : SIMDLdStAliases<asm, "4h", Count, Offset64, 64>; 8365 defm : SIMDLdStAliases<asm, "2s", Count, Offset64, 64>; 8370 int Offset64, bits<4> opcode> { 8418 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8423 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; [all …]
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/external/llvm/tools/dsymutil/ |
D | DwarfLinker.cpp | 1931 uint64_t Offset64 = Reloc.getOffset(); in findValidRelocsMachO() local 1936 uint32_t Offset = Offset64; in findValidRelocsMachO() 1962 ValidRelocs.emplace_back(Offset64, RelocSize, Addend, Mapping); in findValidRelocsMachO() 1967 ValidRelocs.emplace_back(Offset64, RelocSize, SymOffset, Mapping); in findValidRelocsMachO()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 8775 int Offset128, int Offset64, bits<4> opcode> { 8824 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8829 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8834 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8841 defm : SIMDLdStAliases<BaseName, asm, "8b", Count, Offset64, 64>; 8842 defm : SIMDLdStAliases<BaseName, asm, "4h", Count, Offset64, 64>; 8843 defm : SIMDLdStAliases<BaseName, asm, "2s", Count, Offset64, 64>; 8848 int Offset128, int Offset64, bits<4> opcode> { 8896 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; 8901 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>; [all …]
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