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Searched refs:OrigRegs (Results 1 – 9 of 9) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCTLSDynamicCall.cpp76 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock() local
132 LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs); in processBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCTLSDynamicCall.cpp87 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock() local
149 LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs); in processBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTwoAddressInstructionPass.cpp1421 SmallVector<unsigned, 4> OrigRegs; in tryInstructionTransform() local
1425 OrigRegs.push_back(MO.getReg()); in tryInstructionTransform()
1435 LIS->repairIntervalsInRange(MBB, Begin, End, OrigRegs); in tryInstructionTransform()
1802 SmallVector<unsigned, 4> OrigRegs; in eliminateRegSequence() local
1804 OrigRegs.push_back(MI.getOperand(0).getReg()); in eliminateRegSequence()
1806 OrigRegs.push_back(MI.getOperand(i).getReg()); in eliminateRegSequence()
1867 LIS->repairIntervalsInRange(MBB, MBBI, EndMBBI, OrigRegs); in eliminateRegSequence()
DLiveIntervals.cpp1564 ArrayRef<unsigned> OrigRegs) { in repairIntervalsInRange() argument
1596 for (unsigned Reg : OrigRegs) { in repairIntervalsInRange()
/external/llvm/lib/CodeGen/
DTwoAddressInstructionPass.cpp1366 SmallVector<unsigned, 4> OrigRegs; in tryInstructionTransform() local
1370 OrigRegs.push_back(MO.getReg()); in tryInstructionTransform()
1380 LIS->repairIntervalsInRange(MBB, Begin, End, OrigRegs); in tryInstructionTransform()
1740 SmallVector<unsigned, 4> OrigRegs; in eliminateRegSequence() local
1742 OrigRegs.push_back(MI.getOperand(0).getReg()); in eliminateRegSequence()
1744 OrigRegs.push_back(MI.getOperand(i).getReg()); in eliminateRegSequence()
1805 LIS->repairIntervalsInRange(MBB, MBBI, EndMBBI, OrigRegs); in eliminateRegSequence()
DLiveIntervalAnalysis.cpp1483 ArrayRef<unsigned> OrigRegs) { in repairIntervalsInRange() argument
1515 for (unsigned i = 0, e = OrigRegs.size(); i != e; ++i) { in repairIntervalsInRange()
1516 unsigned Reg = OrigRegs[i]; in repairIntervalsInRange()
/external/llvm/lib/Target/AMDGPU/
DSILoadStoreOptimizer.cpp345 unsigned OrigRegs[] = { Data0->getReg(), Data1->getReg(), Addr->getReg() }; in mergeWrite2Pair() local
353 LIS->repairIntervalsInRange(MBB, Write2, Write2, OrigRegs); in mergeWrite2Pair()
/external/llvm/include/llvm/CodeGen/
DLiveIntervalAnalysis.h316 ArrayRef<unsigned> OrigRegs);
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DLiveIntervals.h336 ArrayRef<unsigned> OrigRegs);