Searched refs:OutReg (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 71 unsigned OutReg = MI->getOperand(0).getReg(); in processBlock() local
76 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock()
120 BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg) in processBlock()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 82 unsigned OutReg = MI.getOperand(0).getReg(); in processBlock() local
87 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock()
137 BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg) in processBlock()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXISelLowering.cpp | 328 SDValue OutReg = DAG.getRegister(Reg, RegVT); in LowerReturn() local
330 Chain = DAG.getNode(PTXISD::WRITE_PARAM, dl, MVT::Other, Copy, OutReg); in LowerReturn()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 206 unsigned OutReg = MI.getOperand(0).getReg(); in LowerFPToInt() local
249 FalseReg = MRI.createVirtualRegister(MRI.getRegClass(OutReg)); in LowerFPToInt()
250 TrueReg = MRI.createVirtualRegister(MRI.getRegClass(OutReg)); in LowerFPToInt()
297 BuildMI(*DoneMBB, DoneMBB->begin(), DL, TII.get(TargetOpcode::PHI), OutReg) in LowerFPToInt()
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