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Searched refs:PACKSS (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h277 X86_INTRINSIC_DATA(avx2_packssdw, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
278 X86_INTRINSIC_DATA(avx2_packsswb, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
842 X86_INTRINSIC_DATA(avx512_mask_packssdw_128, INTR_TYPE_2OP_MASK, X86ISD::PACKSS, 0),
843 X86_INTRINSIC_DATA(avx512_mask_packssdw_256, INTR_TYPE_2OP_MASK, X86ISD::PACKSS, 0),
844 X86_INTRINSIC_DATA(avx512_mask_packssdw_512, INTR_TYPE_2OP_MASK, X86ISD::PACKSS, 0),
845 X86_INTRINSIC_DATA(avx512_mask_packsswb_128, INTR_TYPE_2OP_MASK, X86ISD::PACKSS, 0),
846 X86_INTRINSIC_DATA(avx512_mask_packsswb_256, INTR_TYPE_2OP_MASK, X86ISD::PACKSS, 0),
847 X86_INTRINSIC_DATA(avx512_mask_packsswb_512, INTR_TYPE_2OP_MASK, X86ISD::PACKSS, 0),
1889 X86_INTRINSIC_DATA(sse2_packssdw_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
1890 X86_INTRINSIC_DATA(sse2_packsswb_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
DX86ISelLowering.h380 PACKSS, enumerator
DX86InstrFragmentsSIMD.td389 def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
DX86ISelLowering.cpp22226 case X86ISD::PACKSS: return "X86ISD::PACKSS"; in getTargetNodeName()
29642 Regs[i] = DAG.getNode(X86ISD::PACKSS, DL, MVT::v8i16, Regs[i * 2], in combineVectorTruncationWithPACKSS()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h324 X86_INTRINSIC_DATA(avx2_packssdw, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
325 X86_INTRINSIC_DATA(avx2_packsswb, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
949 X86_INTRINSIC_DATA(avx512_packssdw_512, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
950 X86_INTRINSIC_DATA(avx512_packsswb_512, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
1184 X86_INTRINSIC_DATA(sse2_packssdw_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
1185 X86_INTRINSIC_DATA(sse2_packsswb_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
DX86ISelLowering.h389 PACKSS, enumerator
DX86InstrFragmentsSIMD.td384 def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
DX86ISelLowering.cpp6274 case X86ISD::PACKSS: in getFauxShuffleMask()
6284 if (Opcode == X86ISD::PACKSS) { in getFauxShuffleMask()
9576 PackOpcode = X86ISD::PACKSS; in matchVectorShuffleWithPACK()
17036 assert((Opcode == X86ISD::PACKSS || Opcode == X86ISD::PACKUS) && in truncateVectorWithPACK()
17070 (Opcode == X86ISD::PACKSS || Subtarget.hasSSE41())) { in truncateVectorWithPACK()
17255 truncateVectorWithPACK(X86ISD::PACKSS, VT, In, DL, DAG, Subtarget)) in LowerTRUNCATE()
26051 case X86ISD::PACKSS: return "X86ISD::PACKSS"; in getTargetNodeName()
29055 case X86ISD::PACKSS: { in ComputeNumSignBitsForTargetNode()
30639 Opcode0 == X86ISD::PACKSS || Opcode0 == X86ISD::PACKUS)) { in combineTargetShuffle()
31481 V = DAG.getNode(X86ISD::PACKSS, DL, MVT::v16i8, V, in combineBitcastvxi1()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dvselect-packss.ll335 ; PACKSS case
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc9952 // FastEmit functions for X86ISD::PACKSS.
12018 case X86ISD::PACKSS: return fastEmit_X86ISD_PACKSS_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);