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Searched refs:PB2 (Results 1 – 25 of 48) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dsetcc-to-sub.ll5 %class.PB2 = type { [1 x i32], %class.PB1* }
9 define zeroext i1 @test1(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
20 %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
23 %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
31 define zeroext i1 @test2(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
43 %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
46 %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
54 define zeroext i1 @test3(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
65 %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
68 %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
[all …]
Danyext_srl.ll4 %class.PB2 = type { [1 x i32], %class.PB1* }
8 define zeroext i1 @foo(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr {
10 %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
14 %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
/external/pcre/dist2/src/sljit/
DsljitNativeTILEGX_64.c385 #define PB2(opcode, dst, src) \ macro
1301 FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, ADDR_TMP_mapped)); in getput_arg_fast()
1303 FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], ADDR_TMP_mapped, reg_ar)); in getput_arg_fast()
1371 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped); in getput_arg()
1373 return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar); in getput_arg()
1382 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped); in getput_arg()
1384 return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar); in getput_arg()
1389 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar); in getput_arg()
1391 return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar); in getput_arg()
1397 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]); in getput_arg()
[all …]
/external/u-boot/configs/
DMSI_Primo73_defconfig10 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DA13-OLinuXinoM_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Dsunxi_Gemei_G9_defconfig10 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DiNet_3W_defconfig14 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Dinet9f_rev03_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Dinet97fv2_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DiNet_3F_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Ddserve_dsrv9703c_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DWexler_TAB7200_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DiNet_86VS_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DAinol_AW1_defconfig14 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Dpov_protab2_ips9_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Dinet1_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DA33-OLinuXino_defconfig15 CONFIG_VIDEO_LCD_BL_EN="PB2"
DEmpire_electronix_m712_defconfig15 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DAmpe_A76_defconfig15 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Dinet98v_rev2_defconfig15 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Ddifrnce_dit4350_defconfig15 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DChuwi_V7_CW0825_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DHyundai_A7HD_defconfig13 CONFIG_VIDEO_LCD_BL_PWM="PB2"
DA13-OLinuXino_defconfig15 CONFIG_VIDEO_LCD_BL_PWM="PB2"
Dq8_a13_tablet_defconfig15 CONFIG_VIDEO_LCD_BL_PWM="PB2"

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