Home
last modified time | relevance | path

Searched refs:PBS_RX_MODE (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_pbs.c39 (pbs_mode == PBS_RX_MODE) ? HWS_HIGH2LOW : HWS_LOW2HIGH; in ddr3_tip_pbs()
40 enum hws_dir dir = (pbs_mode == PBS_RX_MODE) ? OPER_READ : OPER_WRITE; in ddr3_tip_pbs()
41 int iterations = (pbs_mode == PBS_RX_MODE) ? 31 : 63; in ddr3_tip_pbs()
42 u32 res_valid_mask = (pbs_mode == PBS_RX_MODE) ? 0x1f : 0x3f; in ddr3_tip_pbs()
69 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
82 validation_val = (pbs_mode == PBS_RX_MODE) ? 0x1f : 0; in ddr3_tip_pbs()
88 (pbs_mode == PBS_RX_MODE) ? 0x1f : 0x3f; in ddr3_tip_pbs()
141 (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
163 (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
183 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
[all …]
Dddr3_training_ip_pbs.h32 PBS_RX_MODE, enumerator
/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_hw_training.c709 mode_config[PBS_RX_MODE] = PUP_PBS_RX; in ddr3_save_training()
732 i == PBS_RX_MODE) { in ddr3_save_training()
Dddr3_hw_training.h282 PBS_RX_MODE, enumerator