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Searched refs:PCC3_RBASE (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx7ulp/
Dpcc.c63 {PCC3_RBASE, LPTPM6_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
64 {PCC3_RBASE, LPTPM7_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
65 {PCC3_RBASE, LPI2C6_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
66 {PCC3_RBASE, LPI2C7_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
67 {PCC3_RBASE, LPUART6_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
68 {PCC3_RBASE, LPUART7_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
69 {PCC3_RBASE, VIU0_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV},
70 {PCC3_RBASE, DSI0_PCC3_SLOT, CLKSRC_PER_BUS, PCC_HAS_DIV},
71 {PCC3_RBASE, LCDIF0_PCC3_SLOT, CLKSRC_PER_PLAT, PCC_HAS_DIV},
72 {PCC3_RBASE, MMDC0_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV},
[all …]
/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Dimx-regs.h139 #define PCC3_RBASE ((AIPS3_BASE + (AIPS3_SLOT_SIZE * PCC3_AIPS3_SLOT))) macro
205 #define LPUART6_PCC_REG (PCC3_RBASE + (4 * LPUART6_PCC3_SLOT))
206 #define LPUART7_PCC_REG (PCC3_RBASE + (4 * LPUART7_PCC3_SLOT))
217 #define MMDC0_PCC_REG (PCC3_RBASE + (4 * MMDC0_PCC3_SLOT))