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Searched refs:PCC_CGC_MASK (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx7ulp/
Dpcc.c99 val |= PCC_CGC_MASK; in pcc_clock_enable()
101 val &= ~PCC_CGC_MASK; in pcc_clock_enable()
145 (val & PCC_CGC_MASK)) { in pcc_clock_sel()
178 (val & PCC_CGC_MASK)) { in pcc_clock_div_config()
206 if ((val & PCC_INUSE_MASK) || (val & PCC_CGC_MASK)) in pcc_clock_is_enable()
Dclock.c187 writel(PCC_CGC_MASK, (PCC1_RBASE + 4 * OCOTP_CTRL_PCC1_SLOT)); in enable_ocotp_clk()
191 writel(PCC_CGC_MASK, in enable_ocotp_clk()
274 writel(PCC_CGC_MASK, (PCC0_RBASE + 0x3C)); in init_clk_rgpio2p()
/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Dpcc.h287 #define PCC_CGC_MASK (0x1 << PCC_CGC_OFFSET) macro