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Searched refs:PCIE0_ENABLE_OFFS (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-mvebu/serdes/a38x/
Dctrl_pex.h38 #define PCIE0_ENABLE_OFFS 0 macro
39 #define PCIE0_ENABLE_MASK (0x1 << PCIE0_ENABLE_OFFS)
Dctrl_pex.c64 tmp |= 0x1 << PCIE0_ENABLE_OFFS; in hws_pex_config()