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Searched refs:PCI_BASE_ADDRESS_0 (Results 1 – 25 of 41) sorted by relevance

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/external/u-boot/board/freescale/common/
Dcds_via.c49 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1ff8); in mpc85xx_config_via_usbide()
80 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1e00); in mpc85xx_config_via_power()
91 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1c00); in mpc85xx_config_via_ac97()
/external/u-boot/drivers/pci/
Dpci_ftpci100.c52 PCI_BASE_ADDRESS_0 + i * 4, 0xffffffff); in setup_pci_bar()
54 PCI_BASE_ADDRESS_0 + i * 4, &tmp32); in setup_pci_bar()
72 PCI_BASE_ADDRESS_0 + i * 4, in setup_pci_bar()
101 PCI_BASE_ADDRESS_0 + i * 4, alloc_base); in setup_pci_bar()
122 PCI_BASE_ADDRESS_0 + i * 4, 0x0); in setup_pci_bar()
Dpci-rcar-gen2.c205 writel(priv->cfg_base + 0x800, devad + PCI_BASE_ADDRESS_0); in rcar_gen2_pci_probe()
214 writel(priv->mem_base + 0x0, devad + PCI_BASE_ADDRESS_0); in rcar_gen2_pci_probe()
221 writel(priv->mem_base + 0x1000, devad + PCI_BASE_ADDRESS_0); in rcar_gen2_pci_probe()
Dpci_common.c126 bar = PCI_BASE_ADDRESS_0 + barnum * 4; in pci_write_bar32()
135 bar = PCI_BASE_ADDRESS_0 + barnum * 4; in pci_read_bar32()
Dpci_auto.c40 for (bar = PCI_BASE_ADDRESS_0; in dm_pciauto_setup_device()
41 bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) { in dm_pciauto_setup_device()
Dpci_auto_old.c50 for (bar = PCI_BASE_ADDRESS_0; in pciauto_setup_device()
51 bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) { in pciauto_setup_device()
Dfsl_pci_init.c363 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff); in fsl_pci_init()
364 pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pcicsrbar_sz); in fsl_pci_init()
372 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, pcicsrbar); in fsl_pci_init()
493 PCI_BASE_ADDRESS_0, pcicsrbar); in fsl_pci_init()
Dpcie_layerscape.c323 dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_0); in ls_pcie_disable_bars()
374 writel(size - 1, bar_base + PCI_BASE_ADDRESS_0); in ls_pcie_ep_setup_bar()
Dpcie_intel_fpga.c96 PCI_FUNC(bdf) == 0 && offset == PCI_BASE_ADDRESS_0) in intel_fpga_pcie_hide_rc_bar()
/external/u-boot/arch/x86/cpu/ivybridge/
Dcpu.c106 pci_bus_write_config(bus, usb0, PCI_BASE_ADDRESS_0, in enable_usb_bar()
113 pci_bus_write_config(bus, usb1, PCI_BASE_ADDRESS_0, in enable_usb_bar()
120 pci_bus_write_config(bus, usb3, PCI_BASE_ADDRESS_0, in enable_usb_bar()
/external/u-boot/drivers/misc/
Dswap_case.c28 (((offset) - PCI_BASE_ADDRESS_0) / sizeof(u32))
93 case PCI_BASE_ADDRESS_0: in sandbox_swap_case_read_config()
135 case PCI_BASE_ADDRESS_0: in sandbox_swap_case_write_config()
/external/u-boot/drivers/usb/host/
Dehci-pci.c31 PCI_BASE_ADDRESS_0, PCI_REGION_MEM); in ehci_pci_init()
68 PCI_BASE_ADDRESS_0, PCI_REGION_MEM); in ehci_pci_legacy_init()
Dxhci-pci.c22 PCI_BASE_ADDRESS_0, PCI_REGION_MEM); in xhci_pci_init()
/external/u-boot/drivers/bios_emulator/
Datibios.c385 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); in PCI_mapBIOSImage()
391 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); in PCI_mapBIOSImage()
452 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); in PCI_unmapBIOSImage()
461 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); in PCI_unmapBIOSImage()
/external/u-boot/arch/x86/cpu/quark/
Dquark.c307 qrk_pci_read_config_dword(QUARK_USB_EHCI, PCI_BASE_ADDRESS_0, &bar); in quark_usb_init()
311 qrk_pci_read_config_dword(QUARK_USB_DEVICE, PCI_BASE_ADDRESS_0, &bar); in quark_usb_init()
/external/u-boot/drivers/mmc/
Dpci_mmc.c33 host->ioaddr = (void *)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, in pci_mmc_probe()
/external/u-boot/board/gdsys/a38x/
Dhydra.c82 fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0, in hydra_initialize()
/external/u-boot/arch/x86/cpu/baytrail/
Dcpu.c56 base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, in arch_cpu_init_dm()
/external/u-boot/board/gdsys/p1022/
Dcontrolcenterd.c384 fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0, in hydra_initialize()
/external/u-boot/cmd/
Dpci.c119 reg_addr = PCI_BASE_ADDRESS_0; in pci_bar_show()
182 { "base address 0", PCI_SIZE_32, PCI_BASE_ADDRESS_0 },
Duniverse.c57 pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_0, &val); in universe_init()
Dtsi148.c61 pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_0, &val); in tsi148_init()
/external/u-boot/drivers/net/
Drtl8169.c1128 pci_read_config_dword(devno, PCI_BASE_ADDRESS_0 + (region * 4), &iobase); in rtl8169_initialize()
1184 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0 + region * 4, &iobase); in rtl8169_eth_probe()
Dpcnet.c185 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &bar); in pcnet_initialize()
/external/u-boot/drivers/video/
Dmb862xx.c197 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &dev->frameAdrs); in pci_video_init()

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