Searched refs:PD_BUS_ACLK_HZ (Results 1 – 2 of 2) sorted by relevance
402 aclk_div = GPLL_HZ / PD_BUS_ACLK_HZ - 1; in rkclk_init()403 assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f); in rkclk_init()404 hclk_div = PD_BUS_ACLK_HZ / PD_BUS_HCLK_HZ - 1; in rkclk_init()406 PD_BUS_ACLK_HZ && (hclk_div < 0x4) && (hclk_div != 0x2)); in rkclk_init()408 pclk_div = PD_BUS_ACLK_HZ / PD_BUS_PCLK_HZ - 1; in rkclk_init()410 PD_BUS_ACLK_HZ && pclk_div < 0x7); in rkclk_init()
19 #define PD_BUS_ACLK_HZ 297000000 macro