Searched refs:PHYS_SDRAM (Results 1 – 25 of 122) sorted by relevance
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69 #define PHYS_SDRAM 0x70000000 macro103 #define CONFIG_AT91SAM9G45_LCD_BASE PHYS_SDRAM + 0xE00000105 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM + 0x2000000 /* load addr */107 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM122 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
77 #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ macro80 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM103 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024))104 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE)
78 #define PHYS_SDRAM 0x60000000 macro80 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM81 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
49 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro54 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM101 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
136 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM142 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro144 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
158 #define PHYS_SDRAM 0x20000000 macro201 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM272 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
172 #define PHYS_SDRAM 0x20000000 macro230 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM302 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
69 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro72 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
111 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro113 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
146 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro148 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
42 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro44 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
43 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro45 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
124 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro125 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
117 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro120 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
178 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro180 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
87 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro89 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
59 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ macro63 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
38 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro40 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
86 #define PHYS_SDRAM CSD0_BASE_ADDR macro89 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
185 #define PHYS_SDRAM (0x80000000) macro188 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
116 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro118 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
68 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro69 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
137 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro139 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
99 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro101 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
127 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; in board_init()142 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, in dram_init()149 gd->bd->bi_dram[0].start = PHYS_SDRAM; in dram_init_banksize()