PIPE_CONTROL_CONST_CACHE_INVALIDATE (reference) in projects: external

Searched refs:PIPE_CONTROL_CONST_CACHE_INVALIDATE (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
D	brw_pipe_control.h	`56 #define PIPE_CONTROL_CONST_CACHE_INVALIDATE (1 << 3) macro 68 (PIPE_CONTROL_STATE_CACHE_INVALIDATE \| PIPE_CONTROL_CONST_CACHE_INVALIDATE \| \`
D	brw_pipe_control.c	`553 PIPE_CONTROL_CONST_CACHE_INVALIDATE \| in brw_emit_mi_flush()`
D	gen7_l3_state.c	`108 PIPE_CONTROL_CONST_CACHE_INVALIDATE \| in setup_l3_config()`
D	brw_misc_state.c	`470 PIPE_CONTROL_CONST_CACHE_INVALIDATE \| in brw_emit_select_pipeline()`
D	brw_program.c	`292 PIPE_CONTROL_CONST_CACHE_INVALIDATE); in brw_memory_barrier()`
D	intel_fbo.c	`1009 PIPE_CONTROL_CONST_CACHE_INVALIDATE); in flush_depth_and_render_caches()`