Searched refs:PIPE_CONTROL_DATA_CACHE_FLUSH (Results 1 – 5 of 5) sorted by relevance
54 #define PIPE_CONTROL_DATA_CACHE_FLUSH (1 << 5) macro64 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_DATA_CACHE_FLUSH | \
54 PIPE_CONTROL_DATA_CACHE_FLUSH; in gen8_add_cs_stall_workaround_bits()554 PIPE_CONTROL_DATA_CACHE_FLUSH | in brw_emit_mi_flush()
88 PIPE_CONTROL_DATA_CACHE_FLUSH | in setup_l3_config()117 PIPE_CONTROL_DATA_CACHE_FLUSH | in setup_l3_config()
459 devinfo->gen >= 7 ? PIPE_CONTROL_DATA_CACHE_FLUSH : 0; in brw_emit_select_pipeline()607 devinfo->gen >= 7 ? PIPE_CONTROL_DATA_CACHE_FLUSH : 0; in brw_upload_state_base_address()
280 unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH | in brw_memory_barrier()