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Searched refs:PIPE_CONTROL_DEPTH_CACHE_FLUSH (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_pipe_control.h59 #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) macro
64 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_DATA_CACHE_FLUSH | \
Dbrw_pipe_control.c48 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in gen8_add_cs_stall_workaround_bits()
296 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH); in brw_emit_depth_stall_flushes()
555 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in brw_emit_mi_flush()
Dgen8_depth_state.c330 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in gen8_write_pma_stall_bits()
344 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in gen8_write_pma_stall_bits()
Dbrw_misc_state.c463 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in brw_emit_select_pipeline()
632 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in brw_upload_state_base_address()
Dbrw_blorp.c1581 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()
1606 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()
1639 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()
1656 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()
Dintel_tex.c313 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_texture_barrier()
Dintel_fbo.c1003 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in flush_depth_and_render_caches()