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Searched refs:PIPE_CONTROL_VF_CACHE_INVALIDATE (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_pipe_control.h55 #define PIPE_CONTROL_VF_CACHE_INVALIDATE (1 << 4) macro
69 PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \
Dbrw_pipe_control.c122 if (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE) { in brw_emit_pipe_control()
556 PIPE_CONTROL_VF_CACHE_INVALIDATE | in brw_emit_mi_flush()
Dbrw_program.c288 bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE; in brw_memory_barrier()