Searched refs:PLLE_BASE (Results 1 – 4 of 4) sorted by relevance
| /external/u-boot/arch/arm/mach-tegra/tegra30/ |
| D | clock.c | 657 #define PLLE_BASE 0x0e8 macro
712 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
715 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
734 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
748 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
761 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
763 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
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| /external/u-boot/arch/arm/mach-tegra/tegra20/ |
| D | clock.c | 628 #define PLLE_BASE 0x0e8 macro
683 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
686 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
715 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
717 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
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| /external/u-boot/arch/arm/mach-tegra/tegra124/ |
| D | clock.c | 942 #define PLLE_BASE 0x0e8 macro
966 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
968 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
993 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1000 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1004 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1006 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
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| /external/u-boot/arch/arm/mach-tegra/tegra210/ |
| D | clock.c | 1128 #define PLLE_BASE 0x0e8 macro
1182 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1189 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1198 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1200 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
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