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Searched refs:PLLE_SS_CNTL_BYPASS_SS (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-tegra/tegra20/
Dclock.c625 #define PLLE_SS_CNTL_BYPASS_SS (1 << 10) macro
712 PLLE_SS_CNTL_BYPASS_SS; in tegra_plle_enable()
743 value &= ~PLLE_SS_CNTL_BYPASS_SS; in tegra_plle_enable()
/external/u-boot/arch/arm/mach-tegra/tegra30/
Dclock.c654 #define PLLE_SS_CNTL_BYPASS_SS (1 << 10) macro
758 PLLE_SS_CNTL_BYPASS_SS; in tegra_plle_enable()
789 value &= ~PLLE_SS_CNTL_BYPASS_SS; in tegra_plle_enable()
/external/u-boot/arch/arm/mach-tegra/tegra124/
Dclock.c939 #define PLLE_SS_CNTL_BYPASS_SS (1 << 10) macro
990 PLLE_SS_CNTL_BYPASS_SS; in tegra_plle_enable()
1027 value &= ~PLLE_SS_CNTL_BYPASS_SS; in tegra_plle_enable()
/external/u-boot/arch/arm/mach-tegra/tegra210/
Dclock.c1125 #define PLLE_SS_CNTL_BYPASS_SS (1 << 10) macro
1228 value &= ~PLLE_SS_CNTL_BYPASS_SS; in tegra_plle_enable()