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Searched refs:PLL_STOP (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap3/
Dclock.c240 clrsetbits_le32(&prcm_base->clken_pll, 0x00070000, PLL_STOP << 16); in dpll4_init_34xx()
293 clrsetbits_le32(&prcm_base->clken2_pll, 0x00000007, PLL_STOP); in dpll5_init_34xx()
346 0x00000007, PLL_STOP); in iva_init_34xx()
492 clrsetbits_le32(&prcm_base->clken_pll, 0x00070000, PLL_STOP << 16); in dpll4_init_36xx()
533 clrsetbits_le32(&prcm_base->clken2_pll, 0x00000007, PLL_STOP); in dpll5_init_36xx()
576 clrsetbits_le32(&prcm_base->clken_pll_iva2, 0x00000007, PLL_STOP); in iva_init_36xx()
/external/u-boot/arch/arm/include/asm/arch-omap3/
Dclocks_omap3.h10 #define PLL_STOP 1 /* PER & IVA */ macro