Searched refs:PPLL_DIV_3 (Results 1 – 2 of 2) sorted by relevance
215 (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) & in radeon_write_pll_regs()264 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK); in radeon_write_pll_regs()265 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()
437 #define PPLL_DIV_3 0x0007 macro